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14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-183S CDFP3-F14
TOP VIEW
A1
B1
NC
C1
D1
Y1
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
D2
C2
NC
B2
A2
Y2
Description
The Intersil HCTS20MS is a Radiation Hardened Dual 4-Input
NAND Gate. A low on any input forces the output to a High state.
The HCTS20MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCTS20MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART
NUMBER
HCTS20DMSR
TEMPERATURE
RANGE
-55
o
C to +125
o
C
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
PACKAGE
14 Lead SBDIP
Functional Diagram
An
Bn
Yn
HCTS20KMSR
-55
o
C to +125
o
C
14 Lead Ceramic
Flatpack
14 Lead SBDIP
Cn
HCTS20D/
Sample
HCTS20K/
Sample
HCTS20HMSR
+25
o
C
Dn
+25
o
C
Sample
14 Lead Ceramic
Flatpack
Die
An
L
X
X
X
H
Bn
X
L
X
X
H
TRUTH TABLE
INPUTS
OUTPUTS
Dn
X
X
X
L
H
Yn
H
H
H
H
L
+25
o
C
Die
Cn
X
X
L
X
H
NOTE: L = Logic Level Low, H = Logic level High, X = Don鈥檛 Care
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright 漏 Intersil Americas Inc. 2002. All Rights Reserved
420
Spec Number
518619
FN3051.1