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HCS21KMSR Datasheet

  • HCS21KMSR

  • Radiation Hardened Dual 4-Input AND Gate

  • 187.57KB

  • 8頁

  • INTERSIL   INTERSIL

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HCS21MS
September 1995
Radiation Hardened
Dual 4-Input AND Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
A1 1
B1 2
NC 3
C1 4
D1 5
Y1 6
GND 7
14 VCC
13 D2
12 C2
11 NC
10 B2
9 A2
8 Y2
Features
鈥?3 Micron Radiation Hardened SOS CMOS
鈥?Total Dose 200K RAD (Si)
鈥?SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
鈥?Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
鈥?Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
鈥?Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
鈥?Latch-Up Free Under Any Conditions
鈥?Military Temperature Range: -55
o
C to +125
o
C
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL ICs
鈥?DC Operating Voltage Range: 4.5V to 5.5V
鈥?Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
鈥?Input Current Levels Ii
鈮?/div>
5碌A(chǔ) at VOL, VOH
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
A1
B1
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
D2
C2
NC
B2
A2
Y2
Description
The Intersil HCS21MS is a Radiation Hardened Dual Input AND
Gate. A high on all inputs forces the output to a High state.
The HCS21MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCS21MS is supplied in a 14 lead Ceramic 鏗俛tpack (K suf鏗亁)
or a SBDIP Package (D suf鏗亁).
C1
D1
Y1
GND
Functional Diagram
An (1, 9)
Ordering Information
PART
NUMBER
HCS21DMSR
TEMPERATURE
RANGE
-55
o
C to +125
o
C
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
PACKAGE
Bn (2, 10)
Yn (6, 8)
Cn (4, 12)
Dn (5, 13)
14 Lead SBDIP
TRUTH TABLE
HCS21KMSR
-55
o
C to +125
o
C
14 Lead Ceramic
Flatpack
An
14 Lead SBDIP
L
X
X
L
X
X
H
INPUTS
Bn
Cn
X
X
L
X
HX
Dn
X
X
X
L
H
OUTPUTS
Yn
L
L
L
L
H
HCS21D/
Sample
HCS21K/
Sample
HCS21HMSR
+25
o
C
+25
o
C
Sample
14 Lead Ceramic
Flatpack
Die
X
X
+25
o
C
Die
H
NOTE: L = Logic Level Low, H = Logic level High, X = Don鈥檛
Care
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright 漏 Intersil Corporation 1999
Spec Number
File Number
53
518762
3052.1

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