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HCS190HMSR Datasheet

  • HCS190HMSR

  • Radiation Hardened Synchronous 4-Bit Up/Down Counter

  • 124.69KB

  • 9頁

  • INTERSIL   INTERSIL

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HCS190MS
September 1995
Radiation Hardened Synchronous
4-Bit Up/Down Counter
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16
TOP VIEW
P1
Q1
Q0
CE
U/D
Q2
Q3
GND
1
2
3
4
5
6
7
8
16 VCC
15 P0
14 CP
13 RC
12 TC
11 PL
10 P2
9 P3
Features
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3 Micron Radiation Hardened SOS CMOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55
o
C to +125
o
C
Signi鏗乧ant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
Input Current Levels Ii
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5碌A(chǔ) at VOL, VOH
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Description
The Intersil HCS190MS is an asynchronously presettable BCD
Decade synchronous counter. Presetting the counter to the
number on the preset data inputs (P0 - P3) is accomplished by a
low on the parallel load input (PL). Counting occurs when (PL) is
high, Count Enable (CE) is low and the Up/Down (U/D) input is
either low for up-counting or high for down-counting. The counter
is incremented or decremented synchronously with the low-to-high
transition of the clock.
When an over鏗俹w or under鏗俹w of the counter occurs, the Terminal
Count output (TC), which is low during counting, goes high and
remains high for one clock cycle. This output can be used for look-
ahead carry in high speed cascading. The TC output also initiates
the Ripple Clock output (RC) which, normally high, goes low and
remains low for the low-level portion of the clock pulse. These
counter can be cascaded using the Ripple Carry output.
If the decade counter is preset to an illegal state or assumes an
illegal state when power is applied, it will return to the normal
sequence in one or two counts.
The HCS190MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS190MS is supplied in a 16 lead Ceramic 鏗俛tpack
(K suf鏗亁) or a SBDIP Package (D suf鏗亁).
P1
Q1
Q0
CE
U/D
Q2
Q3
GND
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
TOP VIEW
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
P0
CP
RC
TC
PL
P2
P3
TRUTH TABLE
INPUTS
PL
H
H
L
H
CE
L
L
X
H
U/D
L
H
X
X
X
X
CP
OUTPUT
FUNCTION
Count Up
Count Down
Preset
No Change
H = High Voltage Level
L = Low Voltage Level
X = Immaterial
=Positive Transistion
Ordering Information
PART NUMBER
HCS190DMSR
HCS190KMSR
HCS190D/Sample
HCS190K/Sample
HCS190HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright 漏 Intersil Corporation 1999
Spec Number
File Number
260
518836
2251.2

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