HCS161MS
September 1995
Radiation Hardened
Synchronous Counter
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16
TOP VIEW
MR
CP
P0
P1
P2
P3
PE
GND
1
2
3
4
5
6
7
8
16 VCC
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 TE
9 SPEN
Features
鈥?3 Micron Radiation Hardened SOS CMOS
鈥?Total Dose 200K RAD (Si)
鈥?SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
鈥?Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-
Day (Typ)
鈥?Dose Rate Survivability: >1 x
10
12
RAD (Si)/s
鈥?Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
鈥?Cosmic Ray Upset Immunity 2 x 10
-9
Error/Bit Day (Typ)
鈥?Latch-Up Free Under Any Conditions
鈥?Military Temperature Range: -55
o
C to +125
o
C
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL ICs
鈥?DC Operating Voltage Range: 4.5V to 5.5V
鈥?Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
鈥?Input Current Levels Ii
鈮?/div>
5碌A(chǔ) at VOL, VOH
Description
The Intersil HCS161MS is a Radiation Hardened 4-Input Binary;
synchronous counter featuring asynchronous reset and look-
ahead carry logic. The HCS161 has an active-low master reset to
zero, MR. A low level at the synchronous parallel enable, SPE,
disables counting and allows data at the preset inputs (p0 - p3) to
load the counter. The data is latched to the outputs on the posi-
tive edge of the clock input, CP. The HCS161MS has two count
output, IC. The terminal count output indicates a maximum count
for one clock pulse and is used to enable the next cascaded
stage to count.
The HCS161MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS161MS is supplied in a 16 lead Ceramic 鏗俛tpack
(K suf鏗亁) or a SBDIP Package (D suf鏗亁).
MR
CP
P0
P1
P2
P3
PE
GND
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
TOP VIEW
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
TC
Q0
Q1
Q2
Q3
TE
SPE
Ordering Information
PART NUMBER
HCS161DMSR
HCS161KMSR
HCS161D/Sample
HCS161K/Sample
HCS161HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
DB NA
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright 漏 Intersil Corporation 1999
Spec Number
File Number
193
518755
2469.2
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