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HCF4516BM013TR Datasheet

  • HCF4516BM013TR

  • PRESETTABLE UP/DOWN COUNTERS

  • 12頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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HCF4510B
HCF4516B
PRESETTABLE UP/DOWN COUNTERS
MEDIUM SPEED OPERATION f
CL
= 8MHz
TYP. AT 10V
s
SYNCHRONOUS INTERNAL CARRY
PROPAGATION
s
RESET AND PRESET CAPABILITY
s
QUIESCENT CURRENT SPECIFIED TO 15V
s
5V, 10V, AND 15V PARAMETRIC RATINGS
s
INPUT CURRENT OF 100nAAT 15V AND 25擄C
s
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
TENTATIVE STANDARD No. 13A, 鈥漇TANDARD
SPECIFICATIONS FOR DESCRIPTION OF 鈥滲鈥?/div>
SERIES CMOS DEVICES鈥?/div>
s
DIP
ORDER CODES
PACKAGE
DIP
SOP
TUBE
HCF45XXBEY
HCF45XXBM1
SOP
T& R
HCF45XXM013TR
DESCRIPTION
The HCF4510B and HCF4516B are monolithic
integrated circuits available in 16-lead dual in-line
plastic and plastic micro package. The
HCF4510B Presettable BCD Up/Down Counter
and the HCF4516B Presettable Binary Up/Down
Counter consist of four synchronously clocked
D-type flip-flops (with a gating structure to provide
T-type flip-flop capability) connected as counters.
These counters can be cleared by a high level on
the RESET line, and can be preset to any binary
number present on the jam inputs by a high level
on the PRESET ENABLE line. The HCF4510B
will count out of non-BCD counter states in a
maximum of two clock pulses in the up mode,
PIN CONNECTION
and a maximum of four clock pulses in the down
mode. If the CARRY-IN input is held low, the
counter advances up or down on each
positive-going clock transition. Synchronous
cascading is accomplished by connecting all
clock inputs in parallel and connecting the
CARRY-OUT of a less significant stage to the
CARRY-IN of a more significant stage. The
HCF4510B and HCF4516B can be loaded in the
ripple mode by connecting the CARRY-OUT to
the clock of the next stage. If the UP/DOWN input
changes during a terminal count, the
CARRY-OUT must be gated with the clock, and
the UP/DOWN input must change while the clock
is high. This method provides a clean clock signal
to the subsequent counting stage.
March 2000
1/12

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