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HC6094IN Datasheet

  • HC6094IN

  • ADSL Analog Front End Chip

  • 54.76KB

  • 9頁(yè)

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Semiconductor
February 1999
T
NT
DUC
PRO LACEME 747
7
ETE
P
SOL DED RE 800-442-
B
O
EN
om
s 1-
OMM lication harris.c
C
E
NO R ntral App entapp@
Ce
: c
Call or email
HC6094
ADSL Analog Front End Chip
VSSA_RX
D0 (LSB)
PGAI+
PGAO+
VDDA_RX
PGAO-
[ /Title
(HC60
94)
/Sub-
ject
(ADSL
Ana-
log
Front
End
Chip)
/Autho
r ()
/Key-
words
(Har-
ris
Semi-
con-
ductor,
Tele-
com,
SLICs,
SLACs
, Tele-
phone,
Tele-
phony,
WLL,
Wire-
less
Local
Loop,
PBX,
Pri-
vate
Branch
Exchan
ge,
NT1+,
CO,
Cen-
Features
鈥?14-Bit 5 MSPS DAC
鈥?Programmable Gain Stages
鈥?Anti-Aliasing and Reconstruction Filters
Description
The HC6094 performs the Analog processing for the ADSL
chip set. The transmit chain has a 14 Bit DAC, a third-order
Chebyshev reconstruction 鏗乴ter and a programmable attenu-
ator (-12 to 0dB) capable of driving a 220鈩?differential load.
The receiver chain has a high impedance input stage, pro-
grammable gain stage (0 to 24dB), additional programmable
gain (-9 to 18dB) and a third-order Chebyshev anti-aliasing
鏗乴ter for driving an off-chip A/D.
Laser tri
mmable thin-鏗乴m resistors are used to set the 鏗乴ter
Applications
鈥?FDM DMT ADSL
鈥?CAP ADSL
鈥?EC DMT ADSL
鈥?Communications Receiver
cutoff frequency and DAC linearity. The transmit and receive
signal chains are speci鏗乪d at 65dB MTPR.
Ordering Information
PART
NUMBER
HC6094IN
TEMP.
RANGE (
o
C)
-40 to 85
PACKAGE
44 Ld MQFP
PKG. NO.
Q44.10x10
Pinout
HC6094
(MQFP)
TOP VIEW
VDDA_ATT
D13 (MSB)
GNDD_TX
GNDA_TX
VDDD_TX
CTLOUT
CTLIN
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
1
44 43 42 41 40 39 38 37 36 35 34
33
2
32
3
4
5
6
7
8
9
31
30
29
28
27
26
25
24
TXO+
TXO-
CLK
D12
VSSA_ATT
VDDA_TX
VSSA_TX
ARTN
VDDD_RX
CS
SDI
RST
SCLK
GNDD__RX
GNDA_RX
10
11
23
12 13 14 15 16 17 18 19 20 21 22
PGAI-
RXO-
RXO+
RXI+
RXI-
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1999
File Number
4260.2
1

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