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HC55120CM Datasheet

  • HC55120CM

  • Low Power Universal SLIC Family

  • 35頁

  • INTERSIL   INTERSIL

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TM
HC55120, HC55121, HC55130, HC55131, HC55140,
HC55141, HC55142, HC55143, HC55150, HC55151
Data Sheet
June 2000
File Number
4659.5
Low Power Universal SLIC Family
The UniSLIC14 is a family of Ultra Low Power SLICs. The
feature set and common pinouts of the UniSLIC14 family
positions it as a universal solution for: Plain Old Telephone
Service (POTS), PBX, Central Office, Loop Carrier, Fiber in the
Loop, ISDN-TA and NT1+, Pairgain and Wireless Local Loop.
The UniSLIC14 family achieves its ultra low power operation
through: Its automatic single and dual battery selection
(based on line length) and battery tracking anti clipping to
ensure the maximum loop coverage on the lowest battery
voltage. This architecture is ideal for power critical
applications such as ISDN NT1+, Pairgain and Wireless
local loop products.
The UniSLIC14 family has many user programmable
features. This family of SLICs delivers a low noise, low
component count solution for Central Of鏗乧e and Loop
Carrier universal voice grade designs. The product family
integrates advanced pulse metering, test and signaling
capabilities, and zero crossing ring control.
The UniSLIC14 family is designed in the Intersil 鈥淟atch鈥?free
Bonded Wafer process. This process dielectrically isolates
the active circuitry to eliminate any leakage paths as found in
our competition鈥檚 JI process. This makes the UniSLIC14
family compliant with 鈥渉ot plug鈥?requirements and operation
in harsh outdoor environments.
Features
鈥?Ultra Low Active Power (OHT) < 60mW
鈥?Single/Dual Battery Operation
鈥?Automatic Silent Battery Selection
鈥?Power Management/Shutdown
鈥?Battery Tracking Anti Clipping
鈥?Single 5V Supply with 3V Compatible Logic
鈥?Zero Crossing Ring Control
- Zero Voltage On/Zero Current Off
鈥?Tip/Ring Disconnect
鈥?Pulse Metering Capability
鈥?4 Wire Loopback
鈥?Programmable Current Feed
鈥?Programmable Resistive Feed
鈥?Programmable Loop Detect Threshold
鈥?Programmable On-Hook and Off-Hook Overheads
鈥?Programmable Overhead for Pulse Metering
鈥?Programmable Polarity Reversal Time
鈥?Selectable Transmit Gain 0dB/-6dB
鈥?2 Wire Impedance Set by Single Network
鈥?Loop and Ground Key Detectors
鈥?On-Hook Transmission
鈥?Common Pinout
鈥?HC55121
- Polarity Reversal
Block Diagram
RRLY
TRLY1
TRLY2
DT
DR
ZERO CURRENT
CROSSING
RING TRIP
DETECTOR
POLARITY
REVERSAL
RING AND TEST
RELAY DRIVERS
STATE
DECODER
AND
DETECTOR
LOGIC
LOOP CURRENT
DETECTOR
GKD/LOOP LENGTH
DETECTOR
C1
C2
C3
C4
C5
SHD
GKD_LVM
CRT_REV_LVM
ILIM
RSYNC_REV
ROH
CDC
RDC_RAC
RD
V
TX
V
RX
PTG
ZT
C
H
鈥?HC55130
- -63dB Longitudinal Balance
鈥?HC55140
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2 Wire Loopback
- -63dB Longitudinal Balance
鈥?HC55142
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2.2V
RMS
Pulse Metering
- 2 Wire Loopback
鈥?HC55150
- Polarity Reversal
- Line Voltage Measurement
- 2.2V
RMS
Pulse Metering
- 2 Wire Loopback
TIP
RING
BGND
AGND
2-WIRE
INTERFACE
LINE FEED
CONTROL
4-WIRE INTERFACE
VF SIGNAL PATH
V
BH
V
BL
V
CC
BATTERY
SELECTION
AND
BIAS
NETWORK
PULSE METERING
SIGNAL PATH
SPM
Applications
鈥?Related Literature
- AN9871, User鈥檚 Guide for UniSLIC14 Eval Board
4-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright
漏
Intersil Corporation 2000

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