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HB52E649E12-B6B Datasheet

  • HB52E649E12-B6B

  • 512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 100 MHz Mem...

  • 16頁(yè)

  • ELPIDA

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HB52E649E12-A6B/B6B
512 MB Registered SDRAM DIMM
64-Mword
脳
72-bit, 100 MHz Memory Bus, 1-Bank Module
(18 pcs of 64 M
脳
4 Components)
PC100 SDRAM
E0020H20 (Ver. 2.0)
Aug. 20, 2001 (K)
Description
The HB52E649E12 belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been developed
as an optimized main memory solution for 8-byte processor applications. The HB52E649E12 is a 64M
脳
72
脳
1-bank Synchronous Dynamic RAM Registered Module, mounted 18 pieces of 256-Mbit SDRAM
(HM5225405BTT) sealed in TSOP package, 1 piece of PLL clock driver, 2 pieces of register driver and 1
piece of serial EEPROM (2-kbit) for Presence Detect (PD). An outline of the HB52E649E12 is 168-pin
socket type package (dual lead out). Therefore, the HB52E649E12 makes high density mounting possible
without surface mount technology. The HB52E649E12 provides common data inputs and outputs.
Decoupling capacitors are mounted beside each TSOP on the module board.
Features
鈥?/div>
Fully compatible with : JEDEC standard outline 8-byte DIMM
: Intel PCB Reference design (Rev.1.2)
鈥?/div>
168-pin socket type package (dual lead out)
錚?/div>
Outline: 133.37 mm (Length)
脳
43.18 mm (Height)
脳
4.00 mm (Thickness)
錚?/div>
Lead pitch: 1.27 mm
鈥?/div>
3.3 V power supply
鈥?/div>
Clock frequency: 100 MHz (max)
鈥?/div>
LVTTL interface
鈥?/div>
Data bus width:
脳
72 ECC
鈥?/div>
Single pulsed
RAS
鈥?/div>
4 Banks can operates simultaneously and independently
鈥?/div>
Burst read/write operation and burst read/single write operation capability
鈥?/div>
Programmable burst length: 1/2/4/8
鈥?/div>
2 variations of burst sequence
錚?/div>
Sequential
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.

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