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GTLP16616MTDX Datasheet

  • GTLP16616MTDX

  • Bus Transceiver

  • 9頁

  • ETC

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GTLP16616 17-Bit TTL/GTLP Bus Transceiver with Buffered Clock
June 1997
Revised December 2000
GTLP16616
17-Bit TTL/GTLP Bus Transceiver
with Buffered Clock
General Description
The GTLP16616 is a 17-bit registered bus transceiver that
provides TTL to GTLP signal level translation. It allows for
transparent, latched and clocked modes of data flow and
provides a buffered GTLP (CLKOUT) clock output from the
TTL CLKAB. The device provides a high speed interface
between cards operating at TTL logic levels and a back-
plane operating at GTLP logic levels. High speed back-
plane operation is a direct result of GTLP鈥檚 reduced output
swing (
<
1V), reduced input threshold levels and output
edge rate control. The edge rate control minimizes bus set-
tling time. GTLP is a Fairchild Semiconductor derivative of
the Gunning Transceiver logic (GTL) JEDEC standard
JESD8-3.
Fairchild鈥檚 GTLP has internal edge-rate control and is pro-
cess, voltage, and temperature (PVT) compensated. Its
function is similar to BTL and GTL but with different output
levels and receiver threshold. GTLP output LOW level is
typically less than 0.5V, the output level HIGH is 1.5V and
the receiver threshold is 1.0V.
Features
s
Bidirectional interface between GTLP and TTL logic
levels
s
Designed with edge rate control circuitry to reduce
output noise on the GTLP port
s
V
REF
pin provides external supply reference voltage for
receiver threshold adjustibility
s
Special PVT compensation circuitry to provide
consistent performance over variations of process,
supply voltage and temperature
s
TTL compatible driver and control inputs
s
Designed using Fairchild advanced CMOS technology
s
Bushold data inputs on the A port eliminates the need
for external pull-up resistors on unused inputs.
s
Power up/down and power off high impedance for live
insertion
s
5 V tolerant inputs and outputs on the LVTTL ports
s
Open drain on GTLP to support wired-or connection
s
Flow through pinout optimizes PCB layout
s
D-type flip-flop, latch and transparent data paths
s
A Port source/sink
鈭?/div>
32 mA/
+
32 mA
s
GTLP Buffered CLKAB signal available (CLKOUT)
Ordering Code:
Order Number
GTLP16616MEA
GTLP16616MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118 0.300鈥?Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
漏 2000 Fairchild Semiconductor Corporation
DS500017
www.fairchildsemi.com

GTLP16616MTDX 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • -

  • 收發(fā)器，非反相

  • 1

  • 17

  • 32mA，32mA

  • 3.15 V ~ 3.45 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 56-TFSOP（0.240"，6.10mm 寬）

  • 56-TSSOP

  • 帶卷 (TR)

GTLP16616MTDX相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Increase the speed of parallel backplanes 3x
  • 英文版
    8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEI...
    TI [Texas ...
  • 英文版
    CMOS 18-Bit TTL/GTLP Universal Bus Transceiver
    FAIRCHILD
  • 英文版
    CMOS 18-Bit TTL/GTLP Universal Bus Transceiver
    FAIRCHILD ...
  • 英文版
    17-Bit TTL/GTLP Bus Transceiver with Buffered Clock
    FAIRCHILD
  • 英文版
    17-Bit TTL/GTLP Bus Transceiver with Buffered Clock
    FAIRCHILD ...
  • 英文版
    17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Cl...
    FAIRCHILD
  • 英文版
    17-Bit TTL/GTLP Synchronous Bus Transceiver with Buff...
    FAIRCHILD ...
  • 英文版
    1-Bit LVTTL/GTLP Transceiver with Separate LVTTL Port and Fe...
    FAIRCHILD
  • 英文版
    1-Bit LVTTL/GTLP Transceiver with Separate LVTTL Port...
    FAIRCHILD ...
  • 英文版
    1-Bit LVTTL/GTLP Driver/Receiver Pair
    Fairchild
  • 英文版
    2-Bit LVTTL/GTLP Transceiver
    FAIRCHILD
  • 英文版
    2-Bit LVTTL/GTLP Transceiver
    FAIRCHILD ...
  • 英文版
    GTLP-to-TTL 1:6 Clock Driver
    FAIRCHILD
  • 英文版
    GTLP-to-TTL 1:6 Clock Driver
    FAIRCHILD ...
  • 英文版
    Low Drive GTLP-to-LVTTL 1:6 Clock Driver
    FAIRCHILD
  • 英文版
    Low Drive GTLP-to-LVTTL 1:6 Clock Driver
    FAIRCHILD ...
  • 英文版
    8-Bit LVTTL/GTLP Bus Transceiver
    FAIRCHILD
  • 英文版
    8-Bit LVTTL/GTLP Bus Transceiver
    FAIRCHILD ...
  • 英文版
    18-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRAN...
    TI [Texas ...

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