音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

GS816136BD-150 Datasheet

  • GS816136BD-150

  • 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

  • 35頁

  • GSI

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預覽

GS816118B(T/D)/GS816132B(D)/GS816136B(T/D)
100-Pin TQFP & 165-Bump BGA
Commercial Temp
Industrial Temp
Features
鈥?FT pin for user-configurable flow through or pipeline
operation
鈥?Single Cycle Deselect (SCD) operation
鈥?IEEE 1149.1 JTAG-compatible Boundary Scan
鈥?2.5 V or 3.3 V +10%/鈥?0% core power supply
鈥?2.5 V or 3.3 V I/O supply
鈥?LBO pin for Linear or Interleaved Burst mode
鈥?Internal input resistors on mode pins allow floating mode pins
鈥?Default to Interleaved Pipeline mode
鈥?Byte Write (BW) and/or Global Write (GW) operation
鈥?Internal self-timed write cycle
鈥?Automatic power-down for portable applications
鈥?JEDEC-standard
100-lead TQFP
100-pin TQFP and 165-bump
BGA packages
鈥?RoHS-compliant 100-pin TQFP and 165-bump BGA packages
available
1M x 18, 512K x 32, 512K x 36
18Mb Sync Burst SRAMs
250 MHz鈥?50 MHz
2.5 V or 3.3 V V
DD
2.5 V or 3.3 V I/O
either linear or interleave order with the Linear Burst Order (LBO)
input. The Burst function need not be used. New addresses can be
loaded on every cycle with no degradation of chip performance.
Flow Through/Pipeline Reads
The function of the Data Output register can be controlled by the
user via the FT mode pin (Pin 14). Holding the FT mode pin low
places the RAM in Flow Through mode, causing output data to
bypass the Data Output Register. Holding FT high places the
RAM in Pipeline mode, activating the rising-edge-triggered Data
Output Register.
SCD Pipelined Reads
The GS816118B(T/D)/GS816132B(D)/GS816136B(T/D) is a
SCD (Single Cycle Deselect) pipelined synchronous SRAM. DCD
(Dual Cycle Deselect) versions are also available. SCD SRAMs
pipeline deselect commands one stage less than read commands.
SCD RAMs begin turning off their outputs immediately after the
deselect command has been captured in the input registers.
Byte Write and Global Write
Byte write operation is performed by using Byte Write enable
(BW) input combined with one or more individual byte write
signals (Bx). In addition, Global Write (GW) is available for
writing all bytes at one time, regardless of the Byte Write control
inputs.
Sleep Mode
Low power (Sleep mode) is attained through the assertion (High)
of the ZZ signal, or by stopping the clock (CK). Memory data is
retained during Sleep mode.
Core and Interface Voltages
The GS816118B(T/D)/GS816132B(D)/GS816136B(T/D)
operates on a 2.5 V or 3.3 V power supply. All input are 3.3 V and
2.5 V compatible. Separate output power (V
DDQ
) pins are used to
decouple output noise from the internal circuits and are 3.3 V and
2.5 V compatible.
Functional Description
Applications
The GS816118B(T/D)/GS816132B(D)/GS816136B(T/D) is an
18,874,368-bit high performance synchronous SRAM with a 2-bit
burst address counter. Although of a type originally developed for
Level 2 Cache applications supporting high performance CPUs,
the device now finds application in synchronous SRAM
applications, ranging from DSP main store to networking chip set
support.
Controls
Addresses, data I/Os, chip enable (E1), address burst control
inputs (ADSP, ADSC, ADV) and write control inputs (Bx, BW,
GW) are synchronous and are controlled by a positive-edge-
triggered clock input (CK). Output enable (G) and power down
control (ZZ) are asynchronous inputs. Burst cycles can be initiated
with either ADSP or ADSC inputs. In Burst mode, subsequent
burst addresses are generated internally and are controlled by
ADV. The burst address counter may be configured to count in
Parameter Synopsis
-250
Pipeline
3-1-1-1
t
KQ
tCycle
Curr
(x18)
Curr
(x32/x36)
t
KQ
tCycle
Curr
(x18)
Curr
(x32/x36)
2.5
4.0
295
345
5.5
5.5
225
255
-200
3.0
5.0
245
285
6.5
6.5
200
220
-150
3.8
6.7
200
225
7.5
7.5
185
205
Unit
ns
ns
mA
mA
ns
ns
mA
mA
Flow Through
2-1-1-1
Rev: 1.03 9/2005
1/35
漏 2004, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS816136BD-150相關(guān)型號PDF文件下載

您可能感興趣的PDF文件資料

熱門IC型號推薦

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋
返回頂部

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！