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GM71V64403CJ-5 Datasheet

  • GM71V64403CJ-5

  • x4 EDO Page Mode DRAM

  • 25頁

  • ETC

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16,777,216 WORDS x 4 BIT
CMOS DYNAMIC RAM
GM71V64403C
GM71VS64403CL
Description
The GM71V(S)64403C/CL is the new generation
dynamic RAM organized 16,777,216 words by 4bits.
The GM71V(S)64403C/CL utilizes advanced CMOS
Silicon Gate Process Technology as well as
advanced circuit techniques for wide operating
margins, both internally and to the system user.
System oriented features include single power supply
of 3.3V+/-10% tolerance, direct interfacing
capability with high performance logic families such
as Schottky TTL.
The GM71V(S)64403C/CL offers Extended Data
Out(EDO) Mode as a high speed access mode.
Pin Configuration
32 SOJ / TSOP II
VCC
IO0
IO1
NC
NC
NC
VCC
/WE
/RAS
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VSS
IO3
IO2
NC
NC
VSS
/CAS
/OE
A12
A11
A10
A9
A8
A7
A6
VSS
Features
* 16,777,216 Words x 4 Bit
* Extended Data Out (EDO) Mode Capability
* Fast Access Time & Cycle Time
(Unit: ns)
A1
A2
A3
A4
A5
VCC
t
RAC
GM71V(S)64403C/CL-5
GM71V(S)64403C/CL-6
50
60
t
AA
25
30
t
CAC
13
15
t
RC
84
104
t
HPC
20
25
*Power dissipation
- Active : 432mW/396mW(MAX)
- Standby : 1.8 mW ( CMOS level : MAX )
0.54mW ( L-Version : MAX)
*EDO page mode capability
*Access time : 50ns/60ns (max)
*Refresh cycles
- RAS only Refresh
8192 cycles/64
摟 脗
(GM71V64403C)
8192 cycles/128摟
脗
(GM71VS64403CL)(L_Version)
*CBR & Hidden Refresh
4096 cycles/64
摟 脗
(GM71V64403C)
4096cycles/128
摟 脗
(GM71VS64403CL)( L-Version )
*4 variations of refresh
-RAS-only refresh
-CAS-before-RAS refresh
-Hidden refresh
-Self refresh (L-Version)
*Single Power Supply of 3.3V+/-10 % with a built-in VBB generator
*Battery Back Up Operation ( L-Version )
Rev 0.1 / Apr鈥?/div>
01
(Top View)
1

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