1,048,576 WORDS x 16 BIT
CMOS DYNAMIC RAM
GM71C16163C
GM71CS16163CL
Description
The GM71C(S)16163C/CL is the new generation
dynamic RAM organized 1,048,576 x 16 bit.
GM71C(S)16163C/CL has realized higher density,
higher performance and various functions by utilizing
advanced CMOS process technology. The
GM71C(S)16163C/CL offers Extended Data
out(EDO) Mode as a high speed access mode.
Multplexed address inputs permit the
GM71C(S)16163C/CL to be packaged in standard
400 mil 42pin plastic SOJ, and standard 400mil
44(50)pin plastic TSOP II. The package size provides
high system bit densities and is compatible with
widely available automated testing and insertion
equipment.
Features
* 1,048,576 Words x 16 Bit Organization
* Extended Data Out Mode Capability
* Single Power Supply (5V+/- 10%)
* Fast Access Time & Cycle Time
(Unit: ns)
t
RAC
t
CAC
t
RC
GM71C(S)16163C/CL-5
GM71C(S)16163C/CL-6
GM71C(S)16163C/CL-7
GM71C(S)16163C/CL-8
50
60
70
80
13
15
18
20
84
104
124
144
t
HPC
20
25
30
35
Pin Configuration
42 SOJ
V
CC
I/O0
I/O1
I/O2
I/O3
V
CC
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
* Low Power
Active : 605/550/495/400mW (MAX)
Standby : 11mW (MAX)
0.83mW (L-series : MAX)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
* All inputs and outputs TTL Compatible
* 4096 Refresh Cycles/64ms
* 4096 Refresh Cycles/128ms (L-series)
* Self Refresh Operation (L-version)
* Battery Back Up Operation (L-series)
* 2 CAS byte Control
44(50) TSOP II
V
SS
I/O15
I/O14
I/O13
I/O12
V
SS
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
NC
NC
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
15
16
17
18
19
20
21
22
23
24
25
36
35
34
33
32
31
30
29
28
27
26
V
CC
I/O0
I/O1
I/O2
I/O3
V
CC
I/O4
I/O5
I/O6
I/O7
NC
1
2
3
4
5
6
7
8
9
10
11
50
49
48
47
46
45
44
43
42
41
40
V
SS
I/O15
I/O14
I/O13
I/O12
V
SS
I/O11
I/O10
I/O9
I/O8
NC
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
(Top View)
Rev 0.1 / Apr鈥?1