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GLT41316-35J4 Datasheet

  • GLT41316-35J4

  • 64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE

  • 22頁

  • ETC

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G -LINK
GLT41316
64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE
June 1998 (Rev 2)
Features :
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65,536 words by 16 bits organization.
Fast access time and cycle time.
Dual WE Input.
Low power dissipation.
Read-Modify-Write, RAS -Only Refresh,
Description :
The GLT41316 is a 65,536 x 16 bit high-
performance CMOS dynamic random access
memory. The GLT41316 offers Fast Page
mode ,and has both BYTE WRITE and
WORD WRITE access cycles via two WE
pins. The GLT41316 has symmetric address
and accepts 256-cycle refresh in 4ms
interval.
All inputs are TTL compatible. Fast
Page Mode operation allows random access
up to 256x16 bits, within a page, with cycle
times as short as 18ns.
The GLT41316 is best suited for
graphics, and DSP applications requiring
high performance memories.
CAS -Before- RAS Refresh, Hidden
Refresh and Test Mode Capability.
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256 refresh cycles per 4ms.
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Available in 40-pin 400 mil SOJ,and 40/44
pin TSOP (II).
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Single 5.0V鹵10% Power Supply.
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All inputs and Outputs are TTL
compatible.
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Fast Page Mode operation.
HIGH PERFORMANCE
Max. RAS Access Time, (t
RAC
)
Max. Column Address Access Time, (t
AA
)
Min. Fast Page Mode Cycle Time, (t
PC
)
Min. Read/Write Cycle Time, (t
RC
)
Max. CAS Access Time (t
CAC
)
30
30 ns
15 ns
18 ns
65 ns
10 ns
35
35 ns
18 ns
21 ns
70 ns
11 ns
40
40 ns
20 ns
23 ns
75 ns
12 ns
45
45 ns
22 ns
25 ns
80 ns
12 ns
G-Link Technology Corporation
2701Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation, Taiwan
2F, No.12, R&D Rd. II, Science-Based Industrial Park,
Hsin Chu, Taiwan, R.O.C.
-1-

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