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FSTU6800QSCX Datasheet

  • FSTU6800QSCX

  • Bus Switch

  • 5頁

  • ETC

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FSTU6800 10-Bit Bus Switch with Precharged Outputs
December 1998
Revised December 2000
FSTU6800
10-Bit Bus Switch with Precharged Outputs
and
鈭?/div>
2V Undershoot Protection
General Description
The Fairchild Switch FSTU6800 provides 10-bits of high-
speed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. Both the A Ports and the B
Ports have 鈥渦ndershoot hardened鈥?circuit protection to sup-
port an extended input range to 2.0V below ground. Fair-
child鈥檚 integrated Undershoot Hardened Circuit (UHC
錚?/div>
)
senses undershoot at the I/Os, and responds by preventing
voltage differentials from developing and turning on the
switch. The device also precharges the B Port to a select-
able bias voltage (BiasV) to minimize live insertion noise.
The device is organized as a 10-bit switch with a bus
enable (OE) signal. When OE is LOW, the switch is ON
and Port A is connected to Port B. When OE is HIGH, the
switch is OPEN and the B Port is precharged to BiasV
through an equivalent 10-k
鈩?/div>
resistor.
Features
s
4
鈩?/div>
switch connection between two ports.
s
Undershoot Hardened to -2.0V.
s
Soft enable turn-on to minimize bus-to-bus charge
sharing during enable.
s
Low l
CC
.
s
Zero bounce in flow-through mode.
s
Output precharge to minimize live insertion noise.
s
Control inputs compatible with TTL level.
s
See Applications Note AN-5008 for details.
Ordering Code:
Order Number
FSTU6800WM
FSTU6800QSC
FSTU6800MTC
Package Number
M24B
MQA24
MTC24
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Pin Name
OE
A
B
BiasV
Description
Bus Switch Enable
Bus A
Bus B
Bus B Voltage Bias
Truth Table
OE
L
H
B
0
鈥揃
9
A
0
鈥揂
9
BiasV
Function
Connect
Precharge
UHC錚?is a trademark of Fairchild Semiconductor Corporation.
漏 2000 Fairchild Semiconductor Corporation
DS500194
www.fairchildsemi.com

FSTU6800QSCX 產(chǎn)品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器

  • -

  • 總線開關(guān)

  • 10 x 1:1

  • 1

  • -

  • 單電源

  • 4 V ~ 5.5 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 24-SSOP（0.154"，3.90mm 寬）

  • 24-QSOP

  • 帶卷 (TR)

FSTU6800QSCX相關(guān)型號PDF文件下載

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    廠商
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