鈥?/div>
3-channels
108 Ms/s conversion rate
Programmable Clamps
500ps PLL clock jitter
Adjustable Gain and offset
Internal Reference Voltage
I
2
C/SMBus compatible Serial Port
100-pin package
1600 x 1200/75Hz. ADC sampling clock can be derived from
either an external source or incoming horizontal sync signal
using the internal PLL. Output data is 24-bit RGB. Setup and
control is via registers, accessible through an SMBus/I
2
C com-
patible serial port.
Input amplitude range is 500鈥?000mV with either DC or AC
coupling. Lower reference of AC coupled inputs is estab-
lished with input clamps that are either internally generated
or externally provided.
Common to the three channels are clamp pulses, a bandgap
reference voltage and clocks derived from a PLL or an external
source. Digital data levels are 2.5鈥?.3 volt CMOS compliant.
Power can be derived from a single +3.3 Volt power supply.
Package is a 100-lead MQFP. Performance speci鏗乧ations are
guaranteed over 0擄C to 70擄C range.
Applications
鈥?Flat panel displays and projectors
鈥?RGB Graphics Processing
Description
As a fully integrated analog interface, the FMS9874 can directly
digitize RGB graphics with resolutions up to 1024 x 768/85Hz
and 1280 x 1024/60Hz; or using alternate pixel sampling,
Block Diagram
Clamp
Gain &
Offset
A/D
Converter
DR
7-0
R
IN
G
IN
Clamp
Gain &
Offset
A/D
Converter
DG
7-0
B
IN
Clamp
Gain &
Offset
A/D
Converter
DB
7-0
VREFIN
CLAMP
INVSCK
XCK
HSIN
COAST
LPF
SDA
SCL
A
0
A
1
PWRDN
HS
PLL
PXCK
SCK
Reference
VREFOUT
Timing
Generator
ICLAMP
DCK
DCK
HSOUT
Control
ACS
IN
SYNC
STRIPPER
DCS
OUT
REV. 1.5 11/10/00