FIN1047 3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver
June 2001
Revised August 2003
FIN1047
3.3V LVDS 4-Bit Flow-Through
High Speed Differential Driver
General Description
This quad driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver translates LVTTL signal levels to LVDS lev-
els with a typical differential output swing of 350mV which
provides low EMI at ultra low power dissipation even at
high frequencies. This device is ideal for high speed trans-
fer of clock and data.
The FIN1047 can be paired with its companion receiver,
the FIN1048, or any other LVDS receiver.
Features
s
Greater than 400Mbs data rate
s
Flow-through pinout simplifies PCB layout
s
3.3V power supply operation
s
0.4 ns maximum differential pulse skew
s
1.7 ns maximum propagation delay
s
Low power dissipation
s
Power-Off protection
s
Meets or exceeds the TIA/EIA-644 LVDS standard
s
Pin compatible with equivalent RS-422 and LVPECL
devices
s
16-Lead SOIC and TSSOP packages save space
Ordering Code:
Order Number
FIN1047M
FIN1047MTC
Package Number
M16A
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Descriptions
Pin Name
D
IN1
, D
IN2
, D
IN3
, D
IN4
Description
LVTTL Data Inputs
D
OUT1+
, D
OUT2+
, D
OUT3+
, D
OUT4+
Non-Inverting
Driver Outputs
D
OUT1鈭?/div>
, D
OUT2鈭?/div>
, D
OUT3鈭?/div>
, D
OUT4鈭?/div>
Inverting
Driver Outputs
EN
EN
V
CC
GND
Driver Enable Pin
Inverting Driver
Enable Pin
Power Supply
Ground
Truth Table
Inputs
EN
H
H
H
X
L or OPEN
H
=
HIGH Logic Level
X
=
Don鈥檛 Care
Outputs
D
IN
H
L
OPEN
X
X
D
OUT+
H
L
L
Z
Z
D
OUT鈭?/div>
L
H
H
Z
Z
EN
L or OPEN
L or OPEN
L or OPEN
H
X
L
=
LOW Logic Level
Z
=
High Impedance
漏 2003 Fairchild Semiconductor Corporation
DS500589
www.fairchildsemi.com
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