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EBS21RC2ACNA-7A Datasheet

  • EBS21RC2ACNA-7A

  • 2GB Registered SDRAM DIMM

  • 15頁

  • ELPIDA

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DATA SHEET
2GB Registered SDRAM DIMM
EBS21RC2ACNA (256M words
脳
72 bits, 2 banks)
Description
The EBS21RC2ACNA is 256M words
脳
72 bits, 2
banks Synchronous Dynamic RAM Registered Module,
mounted 72 pieces of 256M bits SDRAM sealed in
TCP package. This module provides high density and
large quantities of memory in a small space without
utilizing the surface mounting technology. Decoupling
capacitors are mounted on power supply line for noise
reduction.
Note: Do not push the cover or drop the modules in
order to protect from mechanical defects, which
would be electrical defects.
Features
鈥?/div>
Fully compatible with 8 bytes DIMM: JEDEC
standard outline
鈥?/div>
168-pin socket type dual in line memory module
(DIMM)
錚?/div>
PCB height: 41.91mm (1.65inch )
錚?/div>
Lead pitch: 1.27mm
鈥?/div>
3.3V power supply
鈥?/div>
Clock frequency: 133MHz (max.)
鈥?/div>
LVTTL interface
鈥?/div>
Data bus width:
脳
72 ECC
鈥?/div>
Single pulsed /RAS
鈥?/div>
4 Banks can operates simultaneously and
independently
鈥?/div>
Burst read/write operation and burst read/single write
operation capability
鈥?/div>
Programmable burst length (BL): 1, 2, 4, 8
鈥?/div>
2 variations of burst sequence
錚?/div>
Sequential
錚?/div>
Interleave
鈥?/div>
Programmable /CAS latency (CL): 2, 3
鈥?/div>
Registered inputs with one clock delay
鈥?/div>
Byte control by DQMB
鈥?/div>
Refresh cycles: 8192 refresh cycles/64ms
鈥?/div>
2 variations of refresh
錚?/div>
Auto refresh
錚?/div>
Self refresh
鈥?/div>
1 piece of PLL clock driver, 3 pieces of register driver
and 1 piece of serial EEPROM (2k bits) for Presence
Detect (SPD) on PCB.
Document No. E0105E50 (Ver. 5.0)
Date Published June 2002 (K) Japan
URL: http://www.elpida.com
錚〦lpida
Memory, Inc. 2001-2002

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