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E5530H-ZZZ-DIT Datasheet

  • E5530H-ZZZ-DIT

  • 128-bit Read-only IDIC for RF Identification

  • 8頁

  • ATMEL   ATMEL

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Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Low-power, Low-voltage CMOS
Rectifier, Voltage Limiter, Clock Extraction On-chip (No Battery)
Small Size
Factory Laser Programmable ROM
Operating Temperature Range -40擄C to +125擄C
Radio Frequency (RF): 100 kHz to 450 kHz
Transmission options
鈥?Code Length: 128, 96, 64, 32 bits
鈥?Bitrate [bit/s]: RF/8, RF/16, RF/32, RF/40, RF/50, RF/64, RF/80, RF/100, RF/128
鈥?Modulation: FSK, PSK, BIPH, Manchester, BIPH-FSK
鈥?/div>
FDX-B Compatible Coding Possible (ISO 11784/ ISO 11785)
Figure 1.
Application
RF transmitter
and
interrogator
128-bit
Read-only
IDIC
餂?/div>
for RF
Identification
e5530
IDIC
RF
ID
e5530
Description
The e5530 is part of a closed coupled identification system. It receives power from an
RF transmitter which is coupled inductively to the IDIC
錚?/div>
. The frequency is typically
100 kHz to 450 kHz. Receiving RF, the IDIC
錚?/div>
responds with a data stream by
damping the incoming RF via an internal load. This damping-in-turn can be detected
by the interrogator. The identifying data are stored in a 128-bit PROM on the e5530,
realized as an array of laser-programmable fuses. The logic block diagram for the
e5530 is shown in figure 2. The data are output bit-serially as a code of length
128, 96, 64 or 32 bits. The chips are factory-programmed with a unique code.
Figure 2.
Block Diagram
Analog front end
Load
Mod
Modulator
FSK
PSK
BIPH
Manchester
Data
Row decoder
Coil
Clock
extractor
Clk
R7
R6
R5
R4
R3
R2
R1
R0
128-bit PROM
Coil
Rectifier
Bitrate
V
DD
V
SS
A2
A1
A0
A6
A5
A4
A3
Counter
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
Column decoder
Rev. 4508B鈥揜FID鈥?2/02
1

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