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DSP56F803BU80 Datasheet

  • DSP56F803BU80

  • 16-bit Hybrid Controller

  • 48頁(yè)

  • MOTOROLA   MOTOROLA

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Freescale Semiconductor, Inc.
DSP56F803/D
Rev. 13.0, 02/2004
56F803
Technical Data
56F803 16-bit Hybrid Controller
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Up to 40 MIPS at 80MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
Hardware DO and REP loops
MCU-friendly instruction set supports both
DSP and controller functions: MAC, bit
manipulation unit, 14 addressing modes
31.5K
脳
16-bit words Program Flash
512
脳
16-bit words Program RAM
4K
脳
16-bit words Data Flash
2K
脳
16-bit words Data RAM
2K
脳
16-bit words Boot Flash
6
3
3
PWM Outputs
Current Sense Inputs
Fault Inputs
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Up to 64K
脳
16-bit words each of external
Program and Data memory
6-channel PWM module
Two 4-channel 12-bit ADCs
Quadrature Decoder
CAN 2.0 B module
Serial Communication Interface (SCI)
Serial Peripheral Interface (SPI)
Up to two General Purpose Quad Timers
JTAG/OnCE
TM
port for debugging
16 shared GPIO lines
100鈥損in LQFP package
Freescale Semiconductor, Inc...
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PWMA
RESET
IRQA
EXTBOOT
IRQB
6
JTAG/
OnCE
Port
VCAPC V
DD
2
6
V
SS
6*
Digital Reg
Analog Reg
V
DDA
V
SSA
4
4
A/D1
A/D2
VREF
ADC
Interrupt
Controller
Low Voltage
Supervisor
4
Quadrature
Decoder 0 /
Quad Timer A
Program Controller
and
Hardware Looping Unit
Address
Generation
Unit
Data ALU
16 x 16 + 36
鈫?/div>
36-Bit MAC
Three 16-bit Input Registers
Two 36-bit Accumulators
Bit
Manipulation
Unit
Program Memory
32252 x 16 Flash
512 x 16 SRAM
Quad Timer B
Quad Timer C
Quad Timer D
2
CAN 2.0A/B
2
2
SCI
or
GPIO
COP/
Watchdog
Data Memory
4096 x 16 Flash
2048 x 16 SRAM
Boot Flash
2048 x 16 Flash
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PAB
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PDB
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IPBB
CONTROLS
16
PLL
CLKO
XDB2
CGDB
XAB1
XAB2
16-Bit
56800
Core
XTAL
Clock Gen
EXTAL
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INTERRUPT
CONTROLS
16
COP RESET
MODULE CONTROLS
ADDRESS BUS [8:0]
DATA BUS [15:0]
4
SPI
or
GPIO
Application-
Specific
Memory &
Peripherals
IPBus Bridge
(IPBB)
External
Bus
Interface
Unit
External
Address Bus
Switch
External
Data Bus
Switch
Bus
Control
A[00:05]
6
10
16
PS Select
DS Select
WR Enable
RD Enable
A[06:15] or
GPIO-E2:E3 &
GPIO-A0:A7
D[00:15]
*
includes TCS pin which is reserved for factory use and is tied to VSS
Figure 1. 56F803 Block Diagram
漏 Motorola, Inc., 2004. All rights reserved.
For More Information On This Product,
Go to: www.freescale.com

DSP56F803BU80 產(chǎn)品屬性

  • 90

  • 集成電路 (IC)

  • 嵌入式 - 微控制器，

  • 56F8xx

  • 56800

  • 16-位

  • 80MHz

  • CAN，EBI/EMI，SCI，SPI

  • POR，PWM，WDT

  • 16

  • 71KB（35.5K x 16）

  • 閃存

  • -

  • 2.5K x 16

  • 3 V ~ 3.6 V

  • A/D 8x12b

  • 外部

  • -40°C ~ 85°C

  • 100-LQFP

  • 托盤

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