DSM2150F5V
DSM (Digital Signal Processor System Memory)
for Analog Devices DSPs (3.3V Supply)
FEATURES SUMMARY
s
s
s
s
s
s
Glueless Connection to DSP
鈥?Easily add memory, logic, and I/O to the
External Port of ADSP-218x, 219x, 2106x,
2116x, 2153x, and TS101 families of
DSPs from Analog Devices, Inc.
Dual Flash Memories
鈥?Two independent Flash memory arrays
for storing DSP code and data
鈥?Capable of read-while-write concurrent
Flash memory operation
鈥?Device can be configured as 8-bit or 16-bit
鈥?Built-in programmable address decoding
logic allows mapping individual sectors of
each Flash array to any address boundary
鈥?Each Flash sector can be write protected
512 KByte Main Flash memory
鈥?Ample storage for boot loading DSP code/
data upon reset and subsequent code
swaps
鈥?Large capacity for storing tables and
constants or for data recording
32 KByte Secondary Flash memory
鈥?Smaller sector size ideal for storing
calibration and configuration constants.
Eliminate external serial EEPROM.
鈥?Optionally bypass internal DSP boot ROM
during start-up and execute code directly
from Secondary Flash. Use for custom
start-up code and In-Application
Programming (IAP).
Up to 40 Multifunction I/O Pins
鈥?Increase total DSP system I/O capability
鈥?I/O controlled by DSP software or PLD
logic
General purpose PLD
鈥?Use for peripheral glue logic to keypads,
control panel, displays, LCDs, and other
devices
鈥?Over 3,000 gates of PLD with 16 macro
cells
鈥?Eliminate PLDs and external logic devices
鈥?Create state machines, chip selects,
simple shifters and counters, clock
dividers, delays
鈥?Simple PSDsoft Express
鈩?/div>
development
software, free from
www.st.com/psm
Figure 1. TQFP 80-pin Package
TQFP80 (T)
s
s
s
s
s
In-System Programming (ISP) with JTAG
鈥?Program entire chip in 15-35 seconds with
no involvement of the DSP
鈥?Optionally links with DSP JTAG debug
port
鈥?Eliminate need for sockets and pre-
programming of memory and logic
devices
鈥?ISP allows efficient manufacturing and
product testing supporting Just-In-Time
inventory
鈥?Use low-cost FlashLINK
鈩?/div>
cable with any
PC. Available from
www.st.com/psm.
Content Security
鈥?Programmable Security Bit blocks access
of device programmers and readers
Operating Range
鈥?V
CC
: 3.3V 鹵 10%, Temp: 鈥?0擄C to +85擄C
Zero-Power Technology
鈥?50碌A standby current typical
Flash Memory Speed, Endurance, Retention
鈥?120ns, 100K cycles, 15 year retention
August 2004
1/73
next