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DS90CR286MTD Datasheet

  • DS90CR286MTD

  • +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MH...

  • 16頁

  • NSC

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DS90CR285/DS90CR286 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz
March 1999
DS90CR285/DS90CR286
+3.3V Rising Edge Data Strobe LVDS 28-Bit Channel
Link-66 MHz
General Description
The DS90CR285 transmitter converts 28 bits of CMOS/TTL
data into four LVDS (Low Voltage Differential Signaling) data
streams. A phase-locked transmit clock is transmitted in par-
allel with the data streams over a fifth LVDS link. Every cycle
of the transmit clock 28 bits of input data are sampled and
transmitted. The DS90CR286 receiver converts the LVDS
data streams back into 28 bits of CMOS/TTL data. At a trans-
mit clock frequency of 66 MHz, 28 bits of TTL data are trans-
mitted at a rate of 462 Mbps per LVDS data channel. Using
a 66 MHz clock, the data throughput is 1.848 Gbit/s (231
Mbytes/s).
The multiplexing of the data lines provides a substantial
cable reduction. Long distance parallel single-ended buses
typically require a ground wire per active signal (and have
very limited noise rejection capability). Thus, for a 28-bit wide
data and one clock, up to 58 conductors are required. With
the Channel Link chipset as few as 11 conductors (4 data
pairs, 1 clock pair and a minimum of one ground) are
needed. This provides a 80% reduction in required cable
width, which provides a system cost savings, reduces con-
nector physical size and cost, and reduces shielding require-
ments due to the cables鈥?smaller form factor.
The 28 CMOS/TTL inputs can support a variety of signal
combinations. For example, seven 4-bit nibbles or three 9-bit
(byte + parity) and 1 control.
Features
n
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n
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Single +3.3V supply
Chipset (Tx + Rx) power consumption
<
250 mW (typ)
Power-down mode (
<
0.5 mW total)
Up to 231 Megabytes/sec bandwidth
Up to 1.848 Gbps data throughput
Narrow bus reduces cable size
290 mV swing LVDS devices for low EMI
+1V common mode range (around +1.2V)
PLL requires no external components
Low profile 56-lead TSSOP package
Rising edge data strobe
Compatible with TIA/EIA-644 LVDS standard
ESD Rating
>
7 kV
Operating Temperature: 鈭?0藲C to +85藲C
Block Diagrams
DS90CR285
DS90CR286
DS012910-1
DS012910-27
Order Number DS90CR285MTD
See NS Package Number MTD56
Order Number DS90CR286MTD
See NS Package Number MTD56
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 1999 National Semiconductor Corporation
DS012910
www.national.com

DS90CR286MTD 產(chǎn)品屬性

  • National Semiconductor (TI)

  • 4

  • 28

  • 1848 Mbps

  • 3.3 V

  • 1610 mW

  • + 85 C

  • TSSOP-56

  • Tube

  • - 40 C

  • SMD/SMT

  • 34

  • 3.6 V

  • 3 V

  • LVDS

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