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DS3486N Datasheet

  • DS3486N

  • Quad RS-422, RS-423 Line Receiver

  • 6頁

  • NSC

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DS3486 Quad RS-422, RS-423 Line Receiver
May 1998
DS3486
Quad RS-422, RS-423 Line Receiver
General Description
National鈥檚 quad RS-422, RS-423 receiver features four inde-
pendent receivers which comply with EIA Standards for the
electrical characteristics of balanced/unbalanced voltage
digital interface circuits. Receiver outputs are 74LS compat-
ible, TRI-STATE
廬
structures which are forced to a high im-
pedance state when the appropriate output control pin
reaches a logic zero condition. A PNP device buffers each
output control pin to assure minimum loading for either logic
one or logic zero inputs. In addition, each receiver has inter-
nal hysteresis circuitry to improve noise margin and discour-
age output instability for slowly changing input waveforms.
Features
n
n
n
n
n
n
n
Four independent receivers
TRI-STATE outputs
Internal hysteresis 鈭?40 mV (typ)
Fast propagation times 鈭?9 ns (typ)
TTL compatible outputs
5V supply
Pin compatible and interchangeable with MC3486
Block and Connection Diagrams
Dual-In-Line Package
DS005779-2
DS005779-1
Top View
Order Number DS3486M or DS3486N
See NS Package Number M16A or N16E
TRI-STATE
廬
is a registered trademark of National Semiconductor Corp.
漏 1999 National Semiconductor Corporation
DS005779
www.national.com

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