DS26F32MQuad Differential Line Receivers
May 1999
DS26F32M
Quad Differential Line Receivers
General Description
The DS26F32 is a quad differential line receiver designed to
meet the requirements of EIA Standards RS-422 and
RS-423, and Federal Standards 1020 and 1030 for balanced
and unbalanced digital data transmission.
The DS26F32 offers improved performance due to the use
of state-of-the-art L-FAST bipolar technology. The L-FAST
technology allows for higher speeds and lower currents by
utilizing extremely short gate delay times. Thus, the
DS26F32 features lower power, extended temperature
range, and improved specifications.
The device features an input sensitivity of 200 mV over the
input common mode range of
鹵
7.0V. The DS26F32 provides
an enable function common to all four receivers and
TRI-STATE
廬
outputs with 8.0 mA sink capability. Also, a
fail-safe input/output relationship keeps the outputs high
when the inputs are open.
The DS26F32 offers optimum performance when used with
the DS26F31 Quad Differential Line Driver.
Features
n
Military temperature range
n
Input voltage range of
鹵
7.0V (differential or common
mode)
鹵
0.2V sensitivity over the input voltage range
n
Meets all the requirements of EIA standards RS-422 and
RS-423
n
High input impedance (18k typical)
n
30 mV input hysteresis
n
Operation from single +5.0V supply
n
Input pull-down resistor prevents output oscillation on
unused channels
n
TRI-STATE outputs, with choice of complementary
enables, for receiving directly onto a data bus
n
Propagation delay 15 ns typical
Connection Diagrams
16-Lead DIP
20-Lead Ceramic Leadless Chip Carrier
DS009615-7
Function Table
(Each Receiver)
Differential Inputs
V
ID
= (V
IN
+) 鈭?(V
IN
鈭?
V
ID
鈮?/div>
0.2V
DS009615-1
Enables
E
H
X
H
X
L
E
X
L
X
L
H
Outputs
OUT
H
H
L
L
Z
Top View
See NS Package Number J16A
For Complete Military Product Specifications,
refer to the appropriate SMD or MDS.
Order Number DS26F32ME/883,
DS26F32MJ/883 or DS26F32MW/883
See NS Package Number E20A, J16A or W16A
V
ID
鈮?/div>
鈭?.2V
X
H = High Level
L = Low Level
X = Immaterial
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 1999 National Semiconductor Corporation
DS009615
www.national.com
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