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DS21Q348N Datasheet

  • DS21Q348N

  • 3.3V E1/T1/J1 Line Interface

  • 73頁

  • DALLAS   DALLAS

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DS21348/Q348
3.3V E1/T1/J1 Line Interface
www.maxim-ic.com
FEATURES
Complete E1, T1, or J1 line interface unit
(LIU)
Supports both long-haul and short-haul
trunks
Internal software-selectable receive-side
termination for 75鈩?100鈩?120W
3.3V power supply
32-bit or 128-bit crystal-less jitter attenuator
requires only a 2.048MHz master clock for
both E1 and T1 with option to use 1.544MHz
for T1
Generates the appropriate line build-outs,
with and without return loss, for E1 and
DSX-1 and CSU line build-outs for T1
AMI, HDB3, and B8ZS, encoding/decoding
16.384MHz, 8.192MHz, 4.096MHz, or
2.048MHz clock output synthesized to
recovered clock
Programmable monitor mode for receiver
Loopbacks and PRBS pattern generation/
detection with output for received errors
Generates/detects in-band loop codes, 1 to 16
bits including CSU loop codes
8-bit parallel or serial interface with optional
hardware mode
Muxed and nonmuxed parallel bus supports
Intel or Motorola
Detects/generates blue (AIS) alarms
NRZ/bipolar interface for TX/RX data I/O
Transmit open-circuit detection
Receive Carrier Loss (RCL) indication
(G.775)
High-Z State for TTIP and TRING
50mA (rms) current limiter
PIN DESCRIPTION
44
1
44 TQFP
7 mm
CABGA
ORDERING INFORMATION
DS21348TN
DS21348T
DS21348GN
DS21348G
DS21Q348N
DS21Q348
44-Pin TQFP (-40擄C to +85擄C)
44-Pin TQFP
(0
o
C to +70
o
C)
7mm CABGA (-40擄C to +85擄C)
7mm CABGA (0
o
C to +70
o
C)
(Quad) BGA
(-40擄C to +85擄C)
(Quad) BGA
(0
o
C to +70
o
C)
1 of 73
111501

DS21Q348N 產(chǎn)品屬性

  • 90

  • 集成電路 (IC)

  • 接口 - 驅(qū)動器,接收器,收發(fā)器

  • -

  • 線路接口裝置(LIU)

  • -

  • E1

  • 3.135 V ~ 3.465 V

  • 表面貼裝

  • 144-BBGA

  • 144-PBGA(17x17)

  • 管件

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