音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

DS21354LN Datasheet

  • DS21354LN

  • 3.3V/5V E1 Single-Chip Transceivers

  • 927.44KB

  • 124頁

  • MAXIM   MAXIM

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

DS21354/DS21554
3.3V/5V E1 Single-Chip Transceivers
www.maxim-ic.com
GENERAL DESCRIPTION
The DS21354/DS213554 single-chip transceivers
(SCTs) contain all the necessary functions to connect to
E1 lines. The devices are upward-compatible versions
of the DS2153 and DS2154 SCTs. The on-board
clock/data recovery circuitry coverts the AMI/HDB3 E1
waveforms to an NRZ serial stream. Both devices
automatically adjust to E1 22AWG (0.6mm) twisted-
pair cables from 0 to over 2km in length. They can
generate the necessary G.703 waveshapes for both 75W
coax and 120W twisted cables. The on-board jitter
attenuator (selectable to either 32 bits or 128 bits) can
be placed in either the transmit or receive data paths.
The framer locates the frame and multiframe
boundaries and monitors the data stream for alarms. It is
also used for extracting and inserting signaling data, Si,
and Sa-bit information. The on-board HDLC controller
can be used for Sa-bit links or DS0s. The devices
contain a set of internal registers that the user can
access to control the operation of the units. Quick
access through the parallel control port allows a single
controller to handle many E1 lines. The devices fully
meet all the latest E1 specifications, including ITU-T
G.703, G.704, G.706, G.823, G.732, and I.431, ETS
300 011, 300 233, and 300 166, as well as CTR12 and
CTR4.
摟
摟
摟
摟
摟
摟
摟
摟
摟
摟
摟
摟
摟
摟
摟
FEATURES
Complete E1 (CEPT) PCM-30/ISDN-PRI
Transceiver Functionality
On-Board Long- and Short-Haul Line Interface
for Clock/Data Recovery and Waveshaping
32-Bit or 128-Bit Crystal-Less Jitter Attenuator
Frames to FAS, CAS, CCS, and CRC4 Formats
Integral HDLC Controller with 64-Byte Buffers
Configurable for Sa Bits, DS0, or Sub-DS0
Operation
Dual Two-Frame Elastic Store Slip Buffers that
can Connect to Asynchronous Backplanes up to
8.192MHz
Interleaving PCM Bus Operation
8-Bit Parallel Control Port that can be used
Directly
on
Either
Multiplexed
or
Nonmultiplexed Buses (Intel or Motorola)
Extracts and Inserts CAS Signaling
Detects and Generates Remote and AIS Alarms
Programmable Output Clocks for Fractional E1,
H0, and H12 Applications
Fully Independent Transmit and Receive
Functionality
Full Access to Si and Sa Bits Aligned with
CRC-4 Multiframe
Four Separate Loopback Functions for Testing
Functions
Large Counters for Bipolar and Code Violations,
CRC4 Codeword Errors, FAS Word Errors, and
E Bits
IEEE 1149.1 JTAG-Boundary Scan Architecture
Pin Compatible with DS2154/52/352/552 SCTs
3.3V (DS21354) or 5V (DS21554) Supply; Low-
Power CMOS
100-pin LQFP package (14mm x 14mm)
PART
DS21354L
TEMP RANGE
0擄C to +70擄C
-40擄C to +85擄C
0擄C to +70擄C
-40擄C to +85擄C
PIN-PACKAGE
100 LQFP
100 LQFP
100 LQFP
100 LQFP
PIN CONFIGURATION
TOP VIEW
Dallas
Semiconductor
DS21354/DS21554
摟
摟
摟
摟
ORDERING INFORMATION
100
1
DS21354LN
LQFP
DS21554L
DS21554LN
Note:
Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here:
www.maxim-ic.com/errata.
1 of 124
REV: 021004

DS21354LN 產(chǎn)品屬性

  • Lead (SnPb) Finish for COTS

  • 90

  • 集成電路 (IC)

  • 接口 - 電信

  • -

  • 單芯片收發(fā)器

  • E1，HDLC

  • 1

  • 3.14 V ~ 3.47 V

  • 75mA

  • -

  • -40°C ~ 85°C

  • 表面貼裝

  • 100-LQFP

  • 100-LQFP（14x14）

  • 托盤

  • 遠程和 AIS 警報檢測器 / 發(fā)生器

DS21354LN相關(guān)型號PDF文件下載

您可能感興趣的PDF文件資料

熱門IC型號推薦

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋
返回頂部

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！