DS1776 PI-Bus Transceiver
January 1996
DS1776
PI-Bus Transceiver
General Description
The DS1776 is an octal PI-bus Transceiver. The A to B path
is latched. B outputs are open collector with series Schottky
diode, ensuring minimum B output loading. B outputs also
have ramped rise and fall times (2.5 ns typical), ensuring
minimum PI-bus ringing. B inputs have glitch rejection cir-
cuitry, 4 ns typical.
Designed using National鈥檚 Bi-CMOS process for both low
operating and disabled power. AC performance is optimized
for the PI-Bus inter-operability requirements.
The DS1776 is an octal latched transceiver and is intended
to provide the electrical interface to a high performance
wired-or bus. This bus has a loaded characteristic imped-
ance range of 20鈩?to 50鈩?and is terminated on each end
with a 30鈩?to 40鈩?resistor.
The DS1776 is an octal bidirectional transceiver with open
collector B and TRI-STATE
廬
A port output drivers. A latch
function is provided for the A port signals. The B port output
driver is designed to sink 100 mA from 2V and features a
controlled linear ramp to minimize crosstalk and ringing on
the bus.
A separate high level control voltage (V
X
) is provided to pre-
vent the A side output high level from exceeding future high
density processor supply voltage levels. For 5V systems, V
X
is tied to V
CC
.
Features
n
n
n
n
n
n
n
Mil-Std-883C qualified
Similar to BTL
Low power I
CCL
= 41 mA max
B output controlled ramp rate
B input noise immunity, typically 4 ns
Available in 28-pin DIP, Flatpak and CLCC
Pin and function compatible with Signetics 54F776
Pin Configurations
Pin Configuration
Pin Configuration
DS010875-2
Logic Symbol
DS010875-1
Order Number DS1776E/883 or DS1776J/883
See NS Package E28A or J28B
DS010875-3
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 1999 National Semiconductor Corporation
DS010875
www.national.com