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DS1644L-150 Datasheet

  • DS1644L-150

  • Nonvolatile Timekeeping RAM

  • 11頁

  • DALLAS   DALLAS

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DS1644LPM
DS1644LPM
Nonvolatile Timekeeping RAM
FEATURES
PIN ASSIGNMENT
NC
NC
NC
PFO
V
CC
WE
OE
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
34鈥揚IN LOW PROFILE MODULE
NC
NC
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
鈥?/div>
Upward compatible with the DS1643AL Timekeeping
RAM to achieve higher RAM density
鈥?/div>
Integrated NV SRAM, real time clock, crystal, power鈥?/div>
fail control circuit and lithium energy source
鈥?/div>
Low profile socketable module
鈥?255 mil package height
鈥?/div>
Clock
registers are accessed identical to the static
RAM. These registers are resident in the eight top
RAM locations.
the absence of power
鈥?/div>
Totally nonvolatile with over 10 years of operation in
鈥?/div>
Access time of 120 ns and 150 ns
鈥?/div>
Quartz accuracy
鹵1
minute a month @ 25擄C, factory
calibrated
PIN DESCRIPTION
A0鈥揂14
CE
OE
WE
V
CC
GND
DQ0-DQ7
NC
PFO
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Address Input
Chip Enable
Output Enable
Write Enable
+5 Volts
Ground
Data Input/Output
No Connection
Power Fail Output
鈥?/div>
BCD coded year, month, date, day, hours, minutes,
and seconds with leap year compensation valid up to
2100
鈥?/div>
Power鈥揻ail write protection allows for
鹵10%
V
CC
pow-
er supply tolerance
ORDERING INFORMATION
DS1644L鈥揦XX Low Profile Module
鈥?20
鈥?50
120 ns access
150 ns access
DESCRIPTION
The DS1644L is a low profile module that requires a
PLCC surface mountable socket and is functionally
equivalent to the DS1644. The DS1644L is a 32K x 8
nonvolatile static RAM with a full function real time clock
which are both accessible in a Byte鈥搘ide format. The
real time clock information resides in the eight upper-
most RAM locations. The RTC registers contain year,
month, date, day, hours, minutes, and seconds data in
24 hour BCD format. Corrections for the day of the
month and leap year are made automatically. The RTC
clock registers are double buffered to avoid access of in-
correct data that can occur during clock update cycles.
The double buffered system also prevents time loss as
the timekeeping countdown continues unabated by ac-
cess to time register data. The DS1644L also contains
its own power鈥揻ail circuitry which deselects the device
when the V
CC
supply is in an out鈥搊f鈥搕olerance condi-
tion. This feature prevents loss of data from unpredict-
able system operation brought on by low V
CC
as errant
access and update cycles are avoided.
ECopyright
1995 by Dallas Semiconductor Corporation.
All Rights Reserved. For important information regarding
patents and other intellectual property rights, please refer to
Dallas Semiconductor data books.
041697 1/11

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