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DS1225Y-200-IND Datasheet

  • DS1225Y-200-IND

  • 64K Nonvolatile SRAM

  • 8頁

  • DALLAS   DALLAS

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DS1225Y
DS1225Y
64K Nonvolatile SRAM
FEATURES
PIN ASSIGNMENT
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
NC
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
鈥?/div>
10 years minimum data retention in the absence of
external power
鈥?/div>
Data is automatically protected during power loss
鈥?/div>
Directly replaces 8K x 8 volatile static RAM or EE-
PROM
鈥?/div>
Unlimited write cycles
鈥?/div>
Low-power CMOS
鈥?/div>
JEDEC standard 28鈥損in DIP package
鈥?/div>
Read and write access times as fast as 150 ns
鈥?/div>
Full
鹵10%
operating range
鈥?/div>
Optional
industrial temperature range of 鈥?0擄C to
+85擄C, designated IND
28鈥揚IN ENCAPSULATED PACKAGE
720 MIL EXTENDED
PIN DESCRIPTION
A0鈥揂12
DQ0鈥揇Q7
CE
WE
OE
V
CC
GND
NC
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Address Inputs
Data In/Data Out
Chip Enable
Write Enable
Output Enable
Power (+5V)
Ground
No Connect
DESCRIPTION
The DS1225Y 64K Nonvolatile SRAM is a 65,536鈥揵it,
fully static, nonvolatile RAM organized as 8192 words
by 8 bits. Each NV SRAM has a self鈥揷ontained lithium
energy source and control circuitry which constantly
monitors V
CC
for an out鈥搊f鈥搕olerance condition. When
such a condition occurs, the lithium energy source is
automatically switched on and write protection is uncon-
ditionally enabled to prevent data corruption. The NV
SRAM can be used in place of existing 8K x 8 SRAMs
directly conforming to the popular bytewide 28鈥損in DIP
standard. The DS1225Y also matches the pinout of the
2764 EPROM or the 2864 EEPROM, allowing direct
substitution while enhancing performance. There is no
limit on the number of write cycles that can be executed
and no additional support circuitry is required for micro-
processor interfacing.
021998 1/8

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