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DP83953VUL Datasheet

  • DP83953VUL

  • Repeater Interface Controller with Security Features, Intern...

  • 936.88KB

  • 90頁

  • NSC

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DP83953 (RIC2A) Repeater Interface Controller with Security Features, Internal Drivers and Integrated Filters
PRELIMINARY
March 1998
DP83953 (RIC2A)
Repeater Interface Controller with Security Features,
Internal Drivers and Integrated Filters
General Description
The DP83953 Repeater Interface Controller with Security
Features and Integrated Transmit Filters (RIC2A) is an en-
hanced version of the DP83952 Repeater Interface Control-
ler with Security Features (RIC II). The RIC2A integrates
driver and filter circuitry into the RIC II design.
The functionality of the RIC2A is essentially similar to the
RIC II, but the pin definitions have been modified to reflect
the added integrated drivers and filters. Additionally, the
power and ground pin locations have been rearranged.
Therefore, the RIC2A is not a drop in replacement for the
RIC ll.
The RIC2A is National Semiconductor鈥檚 managed repeater
solution designed to comply with IEEE 802.3 Repeater
Specifications. Segment partition and jabber lockup protec-
tion state machines are implemented in accordance with
this standard. The RIC2A has thirteen network interface
ports available, including an AUI compatible port. The AUI
port incorporates drivers to connect an external MAU using
maximum length cable. Similarly, the other twelve interface
ports integrate 10BASE-T transceivers with supporting driv-
er and transmit filter circuitry. (continued)
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1 IEEE 802.3 compatible AUI port
Cascadable for larger hub applications
On chip Elasticity Buffer, Manchester encoder and de-
coder
Separate Partition state machines for each port
Compatible with 802.3k Hub Management require-
ments
LED displays to provide port status information, includ-
ing receive, collision, partition, jabber and link status,
Power-up configuration options
Repeater and Partition Specifications, Status Display,
Processor Operations
Simple processor interface for repeater management
and port disable.
On-chip Event Counters and Event Flag Arrays
Serial Management Bus Interface to combine packet
and repeater status information
Single 5V supply
The Security Features
Prevents unauthorized eavesdropping and/or intrusion
on a per port basis
58 On Chip CAMs (Content Addressable Memory) al-
low storage of acceptable addresses
Learn mode automatically records addresses of at-
tached node
Features
T
T
Fully compliant with the IEEE 802.3 Repeater Specifica-
tion
12 IEEE 802.3 10BASE-T compatible ports with built-in
drivers and analog transmit filters; additional external
isolation transformers are required to implement hubs
System Diagram
FAST
廬
and TRI-STATE
廬
are registered trademarks of National Semiconductor Corporation.
100RIC
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is a trademark of National Semiconductor Corporation
SONIC
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is a trademark of National Semiconductor Corporation
Ethernet is a trademark of Xerox Corporation
GAL
廬
is a registered trademark of Lattice Semiconductor
PAL
廬
is a registered trademark of and license from Advanced Micro Devices, Inc.
漏
1998 National Semiconductor Corporation
www.national.com

DP83953VUL 產(chǎn)品屬性

  • 24

  • 集成電路 (IC)

  • 接口 - 控制器

  • -

  • 以太網(wǎng)轉(zhuǎn)發(fā)器接口控制器

  • IEEE 802.3

  • 4.75 V ~ 5.25 V

  • 870mA

  • 0°C ~ 70°C

  • 表面貼裝

  • 160-BFQFP

  • 160-PQFP（28x28）

  • 托盤

  • *DP83953VUL

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