DP83847 DsPHYTER II 鈥?Single 10/100 Ethernet Transceiver
February 2002
DP83847 DsPHYTER II 鈥?Single 10/100 Ethernet Transceiver
General Description
Features
The DP83847 is a full feature single Physical Layer device
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Low-power 3.3V, 0.18碌m CMOS technology
with integrated PMD sublayers to support both 10BASE-T
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Power consumption < 351mW (typical)
and 100BASE-TX Ethernet protocols over Category 3 (10
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5V tolerant I/Os
Mb/s) or Category 5 unshielded twisted pair cables.
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5V/3.3V MAC interface
The DP83847 is designed for easy implementation of
10/100 Mb/s Ethernet home or office solutions. It interfaces
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IEEE 802.3 ENDEC, 10BASE-T transceivers and filters
to Twisted Pair media via an external transformer. This
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IEEE 802.3u PCS, 100BASE-TX transceivers and filters
device interfaces directly to MAC devices through the IEEE
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IEEE 802.3 compliant Auto-Negotiation
802.3u standard Media Independent Interface (MII) ensur-
ing interoperability between products from different ven-
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Output edge rate control eliminates external filtering for
Transmit outputs
dors.
The DP83847 utilizes on chip Digital Signal Processing
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BaseLine Wander compensation
(DSP) technology and digital Phase Lock Loops (PLLs) for
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IEEE 802.3u MII (16 pins/port)
robust performance under all operating conditions,
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LED support (Link, Rx, Tx, Duplex, Speed, Collision)
enhanced noise immunity, and lower external component
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Single register access for complete PHY status
count when compared to analog solutions.
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10/100 Mb/s packet loopback BIST (Built in Self Test)
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56-pin LLP package (9w) x (9l) x (.75h) mm
Applications
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LAN on Motherboard
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Embedded Applications
System Diagram
Magnetics
DP83847
Ethernet MAC
MII
10/100 Mb/s
DsPHYTER II
RJ-45
10BASE-T
or
100BASE-TX
25 MHz
Clock
Status
LEDs
Typical DsPHYTER II application
漏2002
National Semiconductor Corporation
www.national.com