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DP83256VF-AP Datasheet

  • DP83256VF-AP

  • PLAYERa+⑩ Device (FDDI Physical Layer Controller)

  • 144頁

  • NSC

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DP83256 56-AP 57 PLAYER
a
Device (FDDI Physical Layer Controller)
PRELIMINARY
October 1994
DP83256 56-AP 57
PLAYER
a
TM
Device (FDDI Physical Layer Controller)
General Description
The DP83256 56-AP 57 Enhanced Physical Layer Control-
ler (PLAYER
a
device) implements one complete Physical
Layer (PHY) entity as defined by the Fiber Distributed Data
Interface (FDDI) ANSI X3T9 5 standard
The PLAYER
a
device integrates state of the art digital
clock recovery and improved clock generation functions to
enhance performance eliminate external components and
remove critical layout requirements
FDDI Station Management (SMT) is aided by Link Error
Monitoring support Noise Event Timer (TNE) support Op-
tional Auto Scrubbing support an integrated configuration
switch and built-in functionality designed to remove all strin-
gent response time requirements such as PC React and
CF React
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Features
Y
Y
Y
Y
Y
Y
Single chip FDDI Physical Layer (PHY) solution
Integrated Digital Clock Recovery Module provides en-
hanced tracking and greater lock acquisition range
Integrated Clock Generation Module provides all neces-
sary clock signals for an FDDI system from an external
12 5 MHz reference
Y
Y
Y
Alternate PMD Interface (DP83256-AP 57) supports
UTP twisted pair FDDI PMDs with no external clock re-
covery or clock generation functions required
No External Filter Components
Connection Management (CMT) Support (LEM TNE
PC React CF React Auto Scrubbing)
Full on-chip configuration switch
Low Power CMOS-BIPOLAR design using a single 5V
supply
Full duplex operation with through parity
Separate management interface (Control Bus)
Selectable Parity on PHY-MAC Interface and Control
Bus Interface
Two levels of on-chip loopback
4B 5B encoder decoder
Framing logic
Elasticity Buffer Repeat Filter and Smoother
Line state detector generator
Supports single attach stations dual attach stations
and concentrators with no external logic
DP83256 for SAS DAS single path stations
DP83257 for SAS DAS single dual path stations
DP83256-AP for SAS DAS single path stations that re-
quire the alternate PMD interface
TL F 11708 鈥?1
FIGURE 1-1 FDDI Chip Set Overview
TRI-STATE is a registered trademark of National Semiconductor Corporation
BMAC
TM
BSI
TM
CDD
TM
CDL
TM
CRD
TM
CYCLONE
TM
MACSI
TM
PLAYER
TM
PLAYER
a
TM
and TWISTER
TM
are trademarks of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 11708
RRD-B30M115 Printed in U S A

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