These depletion-mode (normally-on) transistors utilize an ad-
vanced vertical DMOS structure and Supertex鈥檚 well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transis-
tors and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex鈥檚 vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Applications
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Normally-on switches
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Solid state relays
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Converters
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Constant current sources
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Power supply circuits
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Telecom
Package Options
D
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
*
Distance of 1.6 mm from case for 10 seconds.
BV
DSX
BV
DGX
鹵
20V
-55擄C to +150擄C
300擄C
G
D
S
TO-243AA
(SOT-89)
SGD
TO-92
Note:
See Package Outline section for dimensions.
12/13/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
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Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
SUPERTEX
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