DM74LS465 (DM81LS95A) DM74LS466 (DM81LS96A) DM74LS467 (DM81LS97A)
DM74LS468 (DM81LS98A) TRI-STATE Octal Buffer
September 1991
DM74LS465 (DM81LS95A) DM74LS466 (DM81LS96A)
DM74LS467 (DM81LS97A) DM74LS468 (DM81LS98A)
TRI-STATE Octal Buffer
General Description
These devices provide eight two-input buffers in each pack-
age All employ the newest low-power-Schottky TTL tech-
nology One of the two inputs to each buffer is used as a
control line to gate the output into the high-impedance
state while the other input passes the data through the buff-
er The 鈥橪S465 and 鈥橪S467 present true data at the outputs
while the 鈥橪S466 and 鈥橪S468 are inverting On the 鈥橪S465
and 鈥橪S466 versions all eight TRI-STATE enable lines are
common with access through a 2-input NOR gate On the
鈥橪S467 and 鈥橪S468 versions four buffers are enabled from
one common line and the other four buffers are enabled
from another common line In all cases the outputs are
placed in the TRI-STATE condition by applying a high logic
level to the enable pins These devices represent octal low
power-Schottky versions of the very popular DM54 74365
366 367 and 368 (DM8095 96 97 and 98) TRI-STATE
hex buffers
Features
Y
Y
Y
Y
Octal versions of popular DM74365 366 367 and 368
(DM8095 96 97 and 98)
Typical power dissipation
LS465 467 (LS95A 97A) 80 mW
LS466 468 (LS96A 98A) 65 mW
Typical propagation delay
LS465 467 (LS95A 97A) 15 ns
LS466 468 (LS96A 98A) 10 ns
Low power-Schottky TRI-STATE technology
Connection Diagrams
Dual-In-Line Packages
TL F 6435 鈥?1
TL F 6435 鈥?2
TL F 6435 鈥?3
TL F 6435 鈥?4
Order Numbers DM74LS465WM DM81LS95AWM DM74LS465N DM81LS95AN
DM74LS466WM DM81LS96AWM DM74LS466N DM81LS96AN
DM74LS467WM DM81LS97AWM DM74LS467N DM81LS97AN
DM74LS468WM DM81LS98AWM or DM74LS468N DM81LS98AN
See NS Package Number M20B or N20A
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 6435
RRD-B30M105 Printed in U S A
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