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DM74ALS574AWM Datasheet

  • DM74ALS574AWM

  • Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs

  • 7頁(yè)

  • FAIRCHILD

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DM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs
September 1986
Revised February 2000
DM74ALS574A
Octal D-Type Edge-Triggered Flip-Flop
with 3-STATE Outputs
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight flip-flops of the DM74ALS574A are edge-trig-
gered D-type flip-flops. On the positive transition of the
clock, the Q outputs will be set to the logic states that were
set up at the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Features
s
Switching specifications at 50 pF
s
Switching specifications guaranteed over full tempera-
ture and V
CC
range
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
s
Functionally equivalent with DM74LS374
s
Improved AC performance over DM74LS374 at approxi-
mately half the power
s
3-STATE buffer-type outputs drive bus lines directly
Ordering Code:
Order Number
DM74ALS574AWM
DM74ALS574ASJ
DM74ALS574AN
Package Number
M20B
M20D
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
漏 2000 Fairchild Semiconductor Corporation
DS006110
www.fairchildsemi.com

DM74ALS574AWM 產(chǎn)品屬性

  • 36

  • 集成電路 (IC)

  • 邏輯 - 觸發(fā)器

  • 74ALS

  • 標(biāo)準(zhǔn)

  • D 型總線

  • 三態(tài)非反相

  • 1

  • 8

  • 35MHz

  • 4ns

  • 正邊沿

  • 2.6mA，24mA

  • 4.5 V ~ 5.5 V

  • 0°C ~ 70°C

  • 表面貼裝

  • 20-SOIC（0.295"，7.50mm 寬）

  • 管件

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