DM74ALS273 Octal D-Type Edge-Triggered Flip-Flop with Clear
April 1984
Revised February 2000
DM74ALS273
Octal D-Type Edge-Triggered Flip-Flop with Clear
General Description
These monolithic, positive-edge-triggered flip-flops utilize
TTL circuitry to implement D-type flip-flop logic with a direct
clear input.
Information at the D inputs meeting the setup requirements
is transferred to the Q outputs on the positive-going edge
of the clock pulse. Clock triggering occurs at a particular
voltage level and is not directly related to the transition time
of the positive-going pulse. When the clock input is at
either the HIGH or LOW level, the D input signal has no
effect at the output.
Features
s
Switching specifications at 50 pF
s
Switching specifications guaranteed over full tempera-
ture and V
CC
range
s
Buffer-type outputs and improved AC offer significant
advantage over DM74LS273.
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
s
Functionally
DM74LS273.
and
pin-for-pin
compatible
with
Ordering Code:
Order Number
DM74ALS273WM
DM74ALS273SJ
DM74ALS273MSA
DM74ALS273N
Package Number
M20B
M20D
MSA20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
漏 2000 Fairchild Semiconductor Corporation
DS006216
www.fairchildsemi.com