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DJLXT971ALCA4 Datasheet

  • DJLXT971ALCA4

  • 3.3V Dual-Speed Fast Ethernet PHY Transceiver

  • 90頁

  • INTEL   INTEL

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Intel
廬
LXT971A
3.3V Dual-Speed Fast Ethernet PHY Transceiver
Datasheet
The LXT971A is an IEEE compliant Fast Ethernet PHY Transceiver that directly supports both
100BASE-TX and 10BASE-T applications. It provides a Media Independent Interface (MII) for
easy attachment to 10/100 Media Access Controllers (MACs). The LXT971A also provides a
Low Voltage PECL (LVPECL) interface for use with 100BASE-FX fiber networks.
This document also supports the LXT971 device.
The LXT971A supports full-duplex operation at 10 Mbps and 100 Mbps. Its operating condition
can be set using auto-negotiation, parallel detection, or manual control.
The LXT971A is fabricated with an advanced CMOS process and requires only a single 3.3V
power supply.
Applications
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Combination 10BASE-T/100BASE-TX or
100BASE-FX Network Interface Cards
(NICs)
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10/100 PCMCIA Cards
Cable Modems and Set-Top Boxes
Product Features
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鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
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鈻?/div>
3.3V Operation.
Low power consumption (300 mW
typical).
Low-power 鈥淪leep鈥?mode.
10BASE-T and 100BASE-TX using a
single RJ-45 connection.
Supports auto-negotiation and parallel
detection.
MII interface with extended register
capability.
Robust baseline wander correction
performance.
100BASE-FX fiber-optic capable.
Standard CSMA/CD or full-duplex
operation.
Supports JTAG boundary scan.
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Configurable via MDIO serial port or
hardware control pins.
Integrated, programmable LED drivers.
64-ball Plastic Ball Grid Array (PBGA).
鈥?LXT971ABC - Commercial (0
擄
to
70
擄
C ambient).
鈥?LXT971ABE - Extended (-40
擄
to 85
擄
C
ambient).
64-pin Low-profile Quad Flat Package
(LQFP).
鈥?LXT971ALC - Commercial (0
擄
to
70
擄
C ambient).
鈥?LXT971ALE - Extended (-40
擄
to 85
擄
C
ambient).
Order Number: 249414-002
August 2002

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