DG201A, DG202
Data Sheet
June 1999
File Number
3117.2
Quad SPST, CMOS Analog Switches
The DG201A and DG202 quad SPST analog switches are
designed using Intersil鈥檚 44V CMOS process. These
bidirectional switches are latch-proof and feature break-
before-make switching. Designed to block signals up to
30V
P-P
in the OFF state, the DG201A and DG202 offer the
advantages of low ON resistance (鈮?75鈩?, wide input signal
range (鹵15V) and provide both TTL and CMOS compatibility.
The DG201A and DG202 are speci鏗乧ation and pinout
compatible with the industry standard devices.
Features
鈥?Input Signal Range. . . . . . . . . . . . . . . . . . . . . . . . . .
鹵15V
鈥?Low r
DS(ON)
(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . 175鈩?/div>
鈥?TTL, CMOS Compatible
鈥?Latch-Up Proof
鈥?True Second Source
鈥?Maximum Supply Ratings. . . . . . . . . . . . . . . . . . . . . . 44V
鈥?Logic Inputs Accept Negative Voltages
Ordering Information
PART NUMBER
DG201AAK
DG201ABK
DG201ACJ
DG201ACY
DG202AK
DG202CJ
TEMP.
RANGE (
o
C)
-55 to 125
-25 to 85
0 to 70
0 to 70
-55 to 125
0 to 70
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld CERDIP
16 Ld PDIP
PKG.
NO.
F16.3
F16.3
E16.3
M16.3
F16.3
E16.3
Functional Block Diagrams
DG201A
S
1
IN
1
D
1
S
2
IN
2
D
2
S
3
IN
3
D
3
S
4
Pinout
DG201A, DG202
(CERDIP, PDIP, SOIC)
TOP VIEW
1
2
3
4
5
6
7
8
16 IN
2
15 D
2
14 S
2
13 V+ (SUB-
-
STRATE)
12 NC
11 S
3
10 D
3
9 IN
3
IN
4
D
4
DG202
S
1
IN
1
D
1
S
2
IN
2
D
2
S
3
IN
3
D
3
S
4
IN
4
D
4
IN
1
D
1
S
1
V-
GND
S
4
D
4
IN
4
SWITCHES SHOWN FOR LOGIC 鈥?鈥?INPUT
TRUTH TABLE
LOGIC
0
1
DG201A
ON
OFF
DG202
OFF
ON
Logic 鈥?鈥?/div>
鈮?.8V,
Logic 鈥?鈥?/div>
鈮?/div>
2.4V
4-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright 漏 Intersil Corporation 1999
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