DG201
Data Sheet
January 2000
File Number
3115.4
CMOS Quad SPST Analog Switch
The DG201 solid state analog switch is designed using an
improved, high voltage CMOS monolithic technology. It
provides ease-of-use and performance advantages not
previously available from solid state switches. Destructive
latch-up of solid state analog gates have been eliminated by
Intersil鈥檚 CMOS technology.
The DG201 is completely speci鏗乧ation and pinout
compatible with the industry standard devices.
Features
鈥?Switches Greater than 28V
P-P
Signals with
鹵
15V Supplies
鈥?Break-Before-Make Switching
- t
OFF
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250ns
- t
ON
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700ns
鈥?TTL, DTL, CMOS, PMOS Compatible
鈥?Non-Latching with Supply Turn-Off
鈥?Complete Monolithic Construction
鈥?Industry Standard (DG201)
Ordering Information
PART NUMBER
DG201CJ
TEMP. RANGE
(
o
C)
0 to 70
PACKAGE
16 Ld PDIP
PKG.
NO.
E16.3
Applications
鈥?Data Acquisition
鈥?Sample and Hold Circuits
Functional Diagram
S
鈥?Operational Ampli鏗乪r Gain Switching Networks
Pinout
DG201 (PDIP)
TOP VIEW
IN
1
1
16 IN
2
15 D
2
14 S
2
13 V+(SUBSTRATE)
12 V
REF
11 S
3
10 D
3
9 IN
3
IN
N
P
D
D
1
2
S
1
3
V- 4
DG201 SWITCH CELL
GND 5
S
4
6
D
4
7
TRUTH TABLE
LOGIC
0
1
DG201
ON
OFF
IN
4
8
SWITCHES SHOWN FOR LOGIC 鈥?鈥?INPUT
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
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Copyright
漏
Intersil Corporation 2000
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