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CYTC147-45PC Datasheet

  • CYTC147-45PC

  • 4K x 1 Static RAM

  • 7頁(yè)

  • CYPRESS

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7c147: 12/4/89
Revision: Thursday, November 11, 1993
Features
D
D
D
D
D
D
D
Automatic power down when dese
lected
CMOS for optimum speed/power
High speed
25 ns
Low active power
440 mW (commercial)
605 mW (military)
Low standby power
55 mW
TTL compatible inputs and outputs
Capable of withstanding greater than
2001V electrostatic discharge
The CY7C147 is a high performance
CMOS static RAMs organized as 4096
words by 1 bit. Easy memory expansion is
provided by an active LOW chip enable
(CE) and three state drivers. The
CY7C147 has an automatic power down
feature, reducing the power consumption
by 80% when deselected .
Writingtothedeviceisaccomplishedwhen
the chip select (CE) and write enable
Functional Description
(WE) inputs are both LOW. Data on the
input pin (DI) is written into the memory
location specified on the address pins (A
0
through A
11
).
Readingthedeviceisaccomplished bytak
ingthechipenable(CE)LOWwhile(WE)
remains HIGH. Under these conditions,
the contents of the location specified on
the address pins will appear on the data
output (DO) pin.
The output pin remains in a high impe
dance state when chip enable is HIGH, or
write enable (WE) is LOW.
Pin Configuration
4K x 1 Static RAM
CY7C147
Logic Block Diagram
DIP
Top View
DI
A
0
A
1
INPUT BUFFER
A
2
A
3
A
4
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
V
CC
A
6
A
7
A
8
A
9
A
10
A
11
DI
CE
SENSE AMP
A
1
A
2
A
3
A
6
A
7
ROW DECODER
A
0
A
5
DO
64 x 64
ARRAY
DO
WE
GND
C147 2
CE
COLUMN
DECODER
POWER
DOWN
WE
A
4
A
5
A
8
A A
9
10
A
11
C147 1
Selection Guide
Maximum Access Time (ns))
(
Commercial
Military
Maximum Operating Current (mA)) Commercial
p g
(
Military
Maximum Standby Current (mA)) Commercial
y
(
Military
Cypress Semiconductor Corporation
7C147-25
25
90
15
7C147-35
35
35
80
110
10
10
7C147-45
45
45
80
110
10
10
D
3901 North First Street
D
San Jose
D
CA 95134
D
408-943-2600
December 1985 - Revised November 1992

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