CYM1836
128K x 32 Static RAM Module
Features
鈥?High-density 4-megabit SRAM module
鈥?32-bit standard footprint supports densities from 16K
x 32 through 1M x 32
鈥?High-speed CMOS SRAMs
鈥?Access time of 15 ns
鈥?Low active power
鈥?2.6W (max.) at 20 ns
鈥?SMD technology
鈥?TTL-compatible inputs and outputs
鈥?Low profile
鈥?Max. height of 0.57 in.
鈥?Small PCB footprint
鈥?0.78 sq. in.
鈥?Available in SIMM, ZIP format. SIMM suitable for vertical
or angled sockets.
constructed from four 128K x 8 SRAMs in SOJ packages
mounted on an epoxy laminate board with pins. Four chip se-
lects (CS
1
, CS
2
, CS
3
, CS
4
) are used to independently enable
the four bytes. Reading or writing can be executed on individ-
ual bytes or any combination of multiple bytes through proper
use of selects.
Writing to each byte is accomplished when the appropriate
Chip Select (CS) and Write Enable (WE) inputs are both
LOW. Data on the input/output pins (I/O) is written into the
memory location specified on the address pins (A
0
through
A
16
).
Reading the device is accomplished by taking the Chip Select
(CS) LOW while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location
specified on the address pins will appear on the data in-
put/output pins (I/O).
The data input/output pins stay at the high-impedance state
when write enable is LOW or the appropriate chip selects are
HIGH.
Two pins (PD
0
and PD
1
) are used to identify module mem-
ory density in applications where alternate versions of the
JEDEC-standard modules can be interchanged.
Functional Description
The CYM1836 is a high-performance 4-megabit static RAM
module organized as 128K words by 32 bits. This module is
Logic Block Diagram
PD
0
鈭扥PEN
PD
1
鈭扥PEN
A
0
鈭?/div>
A
16
OE
WE
128K x 8
SRAM
CS
1
128K x 8
SRAM
CS
2
128K x 8
SRAM
CS
3
128K x 8
SRAM
CS
4
4
4
17
Pin Configuration
ZIP/SIMM
Top View
PD
0
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
A
7
A
8
A
9
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
14
CS
1
CS
3
A
16
GND
I/O
16
I/O
17
I/O
18
I/O
19
A
10
A
11
A
12
A
13
I/O
20
I/O
21
I/O
22
I/O
23
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
GND
PD
1
I/O
8
I/O
9
I/O
10
I/O
11
A
0
A
1
A
2
I/O
12
I/O
13
I/O
14
I/O
15
GND
A
15
CS
2
CS
4
NC
OE
I/O
24
I/O
25
I/O
26
I/O
27
A
3
A
4
A
5
V
CC
A
6
I/O
28
I/O
29
I/O
30
I/O
31
1836鈥?
4
I/O
0
鈭?/div>
I/O
7
4
I/O
8
鈭?/div>
I/O
15
I/O
16
鈭?/div>
I/O
23
I/O
24
鈭?/div>
I/O
31
1836鈥?
Cypress Semiconductor Corporation
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134
鈥?408-943-2600
February 15, 1999
CYM1836PY-15C相關型號PDF文件下載
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廠商
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