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CY8C24794-SPAX Datasheet

  • CY8C24794-SPAX

  • PSoCTM Mixed-Signal Array

  • 367.81KB

  • 32頁

  • CYPRESS

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PSoC鈩?Mixed-Signal Array
Final Data Sheet
CY8C24794
Features
鈻?/div>
Powerful Harvard Architecture Processor
鉂?/div>
M8C Processor Speeds to 24 MHz
鉂?/div>
Two 8x8 Multiply, 32-Bit Accumulate
鉂?/div>
Low Power at High Speed
鉂?/div>
3.0 to 5.25V Operating Voltage
鉂?/div>
Industrial Temperature Range: -40擄C to +85擄C
鉂?/div>
USB Temperature Range: -10擄C to +85擄C
鈻?/div>
Advanced Peripherals (PSoC Blocks)
鉂?/div>
6 Rail-to-Rail Analog PSoC Blocks Provide:
- Up to 14-Bit ADCs
- Up to 9-Bit DACs
- Programmable Gain Amplifiers
- Programmable Filters and Comparators
鉂?/div>
4 Digital PSoC Blocks Provide:
- 8- to 32-Bit Timers, Counters, and PWMs
- CRC and PRS Modules
- Full-Duplex UART
- Multiple SPI鈩?Masters or Slaves
- Connectable to all GPIO Pins
鉂?/div>
Complex Peripherals by Combining Blocks
鉂?/div>
Capacitive Sensing Application Capability
鈻?/div>
Full-Speed USB (12 Mbps)
鉂?/div>
Four Uni-Directional Endpoints
鉂?/div>
One Bi-Directional Control Endpoint
鉂?/div>
USB 2.0 Compliant
鉂?/div>
Dedicated 256 Byte Buffer
鉂?/div>
No External Crystal Required
鈻?/div>
Flexible On-Chip Memory
鉂?/div>
16K Flash Program Storage 50,000 Erase/
Write Cycles
鉂?/div>
1K SRAM Data Storage
鉂?/div>
In-System Serial Programming (ISSP鈩?
鉂?/div>
Partial Flash Updates
鉂?/div>
Flexible Protection Modes
鉂?/div>
EEPROM Emulation in Flash
鈻?/div>
Programmable Pin Configurations
鉂?/div>
25 mA Sink on all GPIO
鉂?/div>
Pull up, Pull down, High Z, Strong, or Open
Drain Drive Modes on all GPIO
鉂?/div>
Up to 48 Analog Inputs on GPIO
鉂?/div>
Two 33 mA Analog Outputs on GPIO
鉂?/div>
Configurable Interrupt on all GPIO
鈻?/div>
Precision, Programmable Clocking
鉂?/div>
Internal 鹵4% 24/48 MHz Oscillator
鉂?/div>
Internal Oscillator for Watchdog and Sleep
鉂?/div>
.25% Accuracy for USB with no External
Components
鈻?/div>
Additional System Resources
鉂?/div>
I
2
C鈩?Slave, Master, and Multi-Master to
400 kHz
鉂?/div>
Watchdog and Sleep Timers
鉂?/div>
User-Configurable Low Voltage Detection
鉂?/div>
Integrated Supervisory Circuit
鉂?/div>
On-Chip Precision Voltage Reference
鈻?/div>
Complete Development Tools
鉂?/div>
Free Development Software
(PSoC鈩?Designer)
鉂?/div>
Full-Featured, In-Circuit Emulator and
Programmer
鉂?/div>
Full Speed Emulation
鉂?/div>
Complex Breakpoint Structure
鉂?/div>
128K Bytes Trace Memory
Port 7
Port 5
Port 4
Port 3
Port 2
Port 1
Port 0
Analog
Drivers
PSoC鈩?Functional Overview
The PSoC鈩?family consists of many
Mixed-Signal Array with
On-Chip Controller
devices. All PSoC family devices are
designed to replace traditional MCUs, system ICs, and the
numerous discrete components that surround them. The PSoC
CY8C24794 device is a unique member of the PSoC family
because it includes a full-featured, full-speed (12 Mbps) USB
port. Configurable analog, digital, and interconnect circuitry
enable a high level of integration in a host of industrial, con-
sumer, and communication applications.
This architecture allows the user to create customized periph-
eral configurations that match the requirements of each individ-
ual application. Additionally, a fast CPU, Flash program
memory, SRAM data memory, and configurable IO are included
in a range of convenient pinouts and packages.
The PSoC architecture, as illustrated on the left, is comprised of
four main areas: PSoC Core, Digital System, Analog System,
and System Resources including a full-speed USB port. Config-
urable global busing allows all the device resources to be com-
bined into a complete custom system. The PSoC CY8C24794
device can have up to seven IO ports that connect to the global
digital and analog interconnects, providing access to 4 digital
blocks and 6 analog blocks.
System Bus
Global Digital Interconnect
Global Analog Interconnect
PSoC CORE
SRAM
1K
Interrupt
Controller
SROM
Flash 16K
Sleep and
Watchdog
CPU Core (M8C)
Clock Sources
(Includes IMO and ILO)
DIGITAL SYSTEM
Digital
Block
Array
ANALOG SYSTEM
Analog
Ref .
Analog
Block
Array
Digital
Clocks
2
Decimator
MACs
Type 2
I2C
Internal
POR and LVD
Voltage
System Resets
Ref.
USB
Analog
Input
Muxing
SYSTEM RESOURCES
April 14, 2005
漏 Cypress Semiconductor Corp. 2004-2005 鈥?Document No. 38-12018 Rev. *F
1

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