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CY7C187-15PC Datasheet

  • CY7C187-15PC

  • 64K x 1 Static RAM

  • 149.84KB

  • 10頁

  • CYPRESS

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87
CY7C187
64K x 1 Static RAM
Features
鈥?High speed
鈥?15 ns
鈥?CMOS for optimum speed/power
鈥?Low active power
鈥?495 mW
鈥?Low standby power
鈥?220 mW
鈥?TTL compatible inputs and outputs
鈥?Automatic power-down when deselected
vided by an active LOW Chip Enable (CE) and three-state driv-
ers. The CY7C187 has an automatic power-down feature,
reducing the power consumption by 56% when deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW. Data on the
input pin (D
IN
) is written into the memory location specified on
the address pins (A
0
through A
15
).
Reading the device is accomplished by taking the Chip Enable
(CE) LOW, while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location speci-
fied on the address pin will appear on the data output (D
OUT
)
pin.
The output pin stays in high-impedance state when Chip En-
able (CE) is HIGH or Write Enable (WE) is LOW.
The CY7C187 utilizes a die coat to insure alpha immunity.
Functional Description
The CY7C187 is a high-performance CMOS static RAM orga-
nized as 65,536 words x 1 bit. Easy memory expansion is pro-
Logic Block Diagram
Pin Configurations
DI
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
A
5
NC
A
6
A
7
D
OUT
WE
GND
SOJ
Top View
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
A
15
A
14
A
13
A
12
NC
A
11
A
10
A
9
A
8
D
IN
CE
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
D
OUT
WE
GND
DIP
Top View
1
2
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
16
15
14
13
12
V
CC
A
15
A
14
A
13
A
12
A
11
A
10
A
9
A
8
D
IN
CE
A
12
A
13
A
14
A
15
A
0
A
1
A
2
A
3
ROW DECODER
256 x 256
ARRAY
SENSE AMPS
DO
C187鈥?
C187鈥?
CE
COLUMN DECODER
POWER
DOWN
WE
A
4
A
5
A
6
A
7
A
8
A
9
A
10
A
11
C187鈥?
Selection Guide
[1]
7C187-15
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Note:
1. For military specifications, see the CY7C187A datasheet.
7C187-20
20
80
40/20
7C187-25
25
70
20/20
7C187-35
35
70
20/20
15
90
40/20
Cypress Semiconductor Corporation
Document #: 38-05044 Rev. **
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised August 24, 2001

CY7C187-15PC相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int...
    Cypress
  • 英文版
    16K x 16/18 Dual-Port Static RAM
    Cypress
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...

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