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CY7C1006D-10VXI Datasheet

  • CY7C1006D-10VXI

  • 1-Mbit (256K x 4) Static RAM

  • 11頁

  • CYPRESS

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CY7C106D
CY7C1006D
1-Mbit (256K x 4) Static RAM
Features
鈥?Pin- and function-compatible with CY7C106B/CY7C1006B
鈥?High speed
鈥?t
AA
= 10 ns
鈥?Low active power
鈥?I
CC
= 80 mA @ 10 ns
鈥?Low CMOS standby power
鈥?I
SB2
= 3.0 mA
鈥?2.0V Data Retention
鈥?Automatic power-down when deselected
鈥?CMOS for optimum speed/power
鈥?TTL-compatible inputs and outputs
鈥?CY7C106D available in Pb-free 28-pin 400-Mil wide Molded
SOJ package. CY7C1006D available in Pb-free 28-pin
300-Mil wide Molded SOJ package
Functional Description
[1]
The CY7C106D and CY7C1006D are high-performance
CMOS static RAMs organized as 262,144 words by 4 bits.
Easy memory expansion is provided by an active LOW Chip
Enable (CE), an active LOW Output Enable (OE), and tri-state
drivers. These devices have an automatic power-down feature
that reduces power consumption by more than 65% when the
devices are deselected. The four input and output pins (IO
0
through IO
3
) are placed in a high-impedance state when:
鈥?Deselected (CE HIGH)
鈥?Outputs are disabled (OE HIGH)
鈥?When the write operation is active (CE and WE LOW)
Write to the device by taking Chip Enable (CE) and Write
Enable (WE) inputs LOW. Data on the four IO pins (IO
0
through IO
3
) is then written into the location specified on the
address pins (A
0
through A
17
).
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH.
Under these conditions, the contents of the memory location
specified by the address pins appears on the four IO pins.
Logic Block Diagram
INPUT BUFFER
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE
WE
OE
ROW DECODER
256K x 4
ARRAY
SENSE AMPS
IO0
IO1
IO2
IO3
COLUMN DECODER
POWER
DOWN
Note
1. For guidelines on SRAM system design, please refer to the 鈥楽ystem Design Guidelines鈥?Cypress application note, available on the internet at
www.cypress.com.
A0
A10
A11
A12
A13
A14
A15
A16
A17
Cypress Semiconductor Corporation
Document #: 38-05459 Rev. *E
鈥?/div>
198 Champion Court
鈥?/div>
San Jose
,
CA 95134-1709
鈥?/div>
408-943-2600
Revised February 22, 2007
[+] Feedback

CY7C1006D-10VXI 產(chǎn)品屬性

  • CY7C106D/1006D

  • 27

  • 集成電路 (IC)

  • 存儲(chǔ)器

  • -

  • RAM

  • SRAM - 異步

  • 1M（256k x 4）

  • 10ns

  • 并聯(lián)

  • 4.5 V ~ 5.5 V

  • -40°C ~ 85°C

  • 28-BSOJ

  • 28-SOJ

  • 管件

  • 428-2002-5

CY7C1006D-10VXI相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int...
    Cypress
  • 英文版
    16K x 16/18 Dual-Port Static RAM
    Cypress
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...

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