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CY74FCT191T Datasheet

  • CY74FCT191T

  • 4-Bit Up/Down Binary Counter

  • 6頁

  • TI

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Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modi鏗乪d to remove devices not offered.
CY74FCT191T
SCCS016 - May 1994 - Revised February 2000
4-Bit Up/Down Binary Counter
Functional Description
The FCT191T is a reversible modulo-16 binary counter,
featuring synchronous counting and asynchronous presetting.
The preset allows the FCT191T to be used in programmable
dividers. The count enable input, terminal count output, and ripple
clock output make possible a variety of methods of implementing
multiusage counters. In the counting modes, state changes are
initiated by the rising edge of the clock.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Features
鈥?Function, pinout, and drive compatible with FCT and F
logic
鈥?FCT-C speed at 6.2 ns max,
FCT-A speed at 7.8 ns max.
鈥?Reduced V
OH
(typically = 3.3V) versions of equivalent
FCT functions
鈥?Edge-rate control circuitry for signi鏗乧antly improved
noise characteristics
鈥?Power-off disable permits live insertion
鈥?ESD > 2000V
鈥?/div>
Matched rise and fall times
鈥?Sink current
64 mA
Source current
32 mA
Logic Block Diagram
CP
U/D
P
0
CE
P
1
P
2
P
3
PL
Pin Configurations
SOIC/QSOP
Top View
P
1
Q
1
Q
0
CE
U/D
Q
2
Q
3
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
P
0
CP
RC
TC
PL
P
2
P
3
J CLOCK K
PRESET
CLEAR
Q
Q
J CLOCK K
PRESET
CLEAR
Q
Q
J CLOCK K
PRESET
CLEAR
Q
Q
J CLOCK K
PRESET
CLEAR
Q
Q
RC TC
Q
0
Q
1
Q
2
Q
3
Pin Description
Name
CE
CP
P
PL
U/D
Q
RC
TC
Description
Count Enable Input (Active LOW)
Clock Pulse Input (Active Rising Edge)
Parallel Data Inputs
Asynchronous Parallel Load Input (Active LOW)
Up/Down Count Control Input
Flip-Flop Outputs
Ripple Clock Output (Active LOW)
Terminal Count Output
RC Function Table
[1]
Inputs
CE
L
H
X
CP
X
X
T
[2]
H
X
L
Outputs
RC
H
H
Copyright
2000, Texas Instruments Incorporated

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