1CY74FCT16444T/2
H244T
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modi鏗乪d to remove devices not offered.
CY74FCT16244T
CY74FCT162244T
CY74FCT162H244T
SCCS028 - December 1987 - Revised March 2000
16-Bit Buffers/Line Drivers
Functional Description
These 16-bit buffers/line drivers are designed for use in
memory driver, clock driver, or other bus interface applications,
where high-speed and low power are required. With
鏗俹w-through pinout and small shrink packaging board layout
is simpli鏗乪d. The three-state controls are designed to allow
4-bit, 8-bit or combined 16-bit operation. The outputs are de-
signed with a power-off disable feature to allow for live
insertion of boards.
The CY74FCT16244T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162244T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for mini-
mal undershoot and reduced ground bounce. The
CY74FCT162244T is ideal for driving transmission lines.
The CY74FCT162H244T is a 24-mA balanced output part that
has 鈥渂us hold鈥?on the data inputs. The device retains the in-
put鈥檚 last state whenever the input goes to high impedance.
This eliminates the need for pull-up/down resistors and pre-
vents 鏗俹ating inputs.
Features
鈥?FCT-E speed at 3.2 ns
鈥?Power-off disable outputs permits live insertion
鈥?Edge-rate control circuitry for signi鏗乧antly improved
noise characteristics
鈥?Typical output skew < 250 ps
鈥?ESD > 2000V
鈥?TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
鈥?Industrial temperature range of 鈥?0藲C to +85藲C
鈥?/div>
V
CC
= 5V
鹵
10%
CY74FCT16244T Features:
鈥?64 mA sink current, 32 mA source current
鈥?Typical V
OLP
(ground bounce)
<1.0V at V
CC
= 5V, T
A
= 25藲C
CY74FCT162244T Features:
鈥?Balanced output drivers: 24 mA
鈥?Reduced system switching noise
鈥?Typical V
OLP
(ground bounce)
<0.6V at V
CC
= 5V, T
A
= 25藲C
CY74FCT162H244T Features:
鈥?Bus hold on data inputs
鈥?Eliminates the need for external pull-up or pull-down
resistors
Logic Block Diagrams CY74FCT16244T, CY74FCT162244T,
CY74FCT162H244T
1
OE
3
OE
Pin Configuration
SSOP/TSSOP
Top View
1
OE
1
2
3
4
48
47
46
2
OE
1
A
1
1
A
2
1
A
1
1
Y
1
3
A
1
3
Y
1
1
Y
1
1
Y
2
GND
1
A
2
1
Y
2
3
A
2
3
Y
2
1
Y
3
1
Y
4
1
A
3
1
Y
3
3
A
3
3
Y
3
V
CC
2
Y
1
2
Y
2
45
5 16244T 44
162244T
6 162H244T43
42
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
FCT16244鈥?
GND
1
A
3
1
A
4
V
CC
2
A
1
2
A
2
1
A
4
1
Y
4
3
A
4
3
Y
4
GND
2
Y
3
2
Y
4
3
Y
1
GND
2
A
3
2
A
4
3
A
1
3
A
2
FCT16244鈥?
FCT16244鈥?
2
OE
4
OE
3
Y
2
GND
2
A
1
2
Y
1
4
A
1
3
Y
3
4
Y
1
3
Y
4
V
CC
4
Y
1
4
Y
2
GND
3
A
3
3
A
4
2
A
2
2
Y
2
4
A
2
4
Y
2
V
CC
4
A
1
4
A
2
2
A
3
2
Y
3
4
A
3
GND
4
Y
3
4
Y
3
4
Y
4
4
OE
GND
4
A
3
4
A
4
3
OE
2
A
4
2
Y
4
4
A
4
4
Y
4
FCT16244鈥?
FCT16244鈥?
Copyright
漏
2000, Texas Instruments Incorporated
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