6116A: 11/8/89
Revision: Monday, November 8, 1993
Features
D
D
D
D
D
D
D
Automatic power down when
deselected
CMOS for optimum speed/power
High speed
20 ns
Low active power
550 mW
Low standby power
110 mW
TTL compatible inputs and outputs
Capable of withstanding greater
than 2001V electrostatic discharge
The CY6116A and CY6117A are high
performance CMOS static RAMs orga
nized as 2048 words by 8 bits. Easy
memoryexpansionisprovidedbyanactive
LOW chip enable (CE) and active LOW
output enable (OE), and three state driv
ers. The CY6116A and CY6117A have an
automatic power down feature, reducing
the power consumption by 83% when de
selected.
Writingtothedeviceisaccomplishedwhen
the chip enable (CE) and write enable
(WE) inputs are both LOW. Data on the
I/Opins(I/O
0
throughI/O
7
)iswritteninto
Functional Description
the memory location specified on the ad
dress pins (A
0
through A
10
).
Readingthedeviceisaccomplishedbytak
ing chip enable (CE) and output enable
(OE) LOW while write enable (WE) re
mainsHIGH.Undertheseconditions,the
contents of the memory location specified
on the address pins will appear on the I/O
pins.
The I/O pins remain in high impedance
state when chip enable (CE) is HIGH or
write enable (WE) is LOW.
The CY6116A and CY6117A utilize a die
coat to insure alpha immunity.
2K x 8 Static RAM
CY6116A
CY6117A
Logic Block Diagram
A
7
A
6
A
5
A
4
A
3
A
2
A
1
1
2
3
4
5
6
7
8
9
10
11
12
6116A
Pin Configurations
DIP/SOJ
Top View
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
A
8
A
9
WE
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
A
3
A
2
NC
NC
A
1
A
0
I/O
0
5
6
7
8
9
10
11
6116A
4
A4
A5
A6
A7
V
CC
LCC
Top View
A8
3
2 1 28 27 26
25
24
23
22
21
20
19
1213 14 151617 18
1
I/O
2
GND
I/O
3
I/O
4
I/O
5
I/O
6
WE
OE
A
10
NC
NC
CE
I/O
7
A9
6116A-3
I/O
0
INPUT BUFFER
A
0
I/O
0
I/O
1
GND
ROW DECODER
A
9
A
8
A
7
A
6
A
5
A
4
I/O
2
SENSE AMPS
6116A-2
128 x 16 x 8
ARRAY
I/O
3
NC
NC
NC
NC
I/O
5
4
A
6
A
5
A
4
A
3
A
2
5
6
7
8
9
10
11
12
13
3
2
1 32 31 30
29
28
27
26
A
8
A
9
NC
WE
OE
A
10
CE
I/O
7
I/O
6
CE
WE
COLUMN
DECODER
OE
POWER
DOWN
I/O
6
6117A
I/O
7
A
1
A
0
NC
A
3
A
2
A
1
A
0
6116A-1
I/O
0
14 15 16 17 1819 20
GND
I/O
1
I/O
2
NC
I/O
3
I/O
4
I/O
5
NC
A7
I/O
4
V
CC
LCC
Top View
25
24
23
22
21
I/O
A
10
I/O
1
I/O
2
6116A-4
Selection Guide
Maximum Access Time (ns)
Maximum Operating
Current (mA)
Maximum Standby
Current (mA)
Commercial
Military
Commercial
Military
D
6116A-20
6117A-20
20
100
6116A-25
6117A-25
40/20
25
100
125
20
40
D
6116A-35
6117A-35
35
100
100
20
20
D
6116A-45
6117A-45
45
100
100
20
20
6116A-55
6117A-55
55
80
100
20
20
Cypress Semiconductor Corporation
3901 North First Street
1
San Jose
CA 95134
D
408-943-2600
February 1988 - Revised December 1992
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