音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

CY54FCT543T Datasheet

  • CY54FCT543T

  • 8-Bit Latched Registered Transceiver

  • 8頁

  • CYPRESS

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

1CY 54/7 4FCT543 T
fax id: 7040
CY54/74FCT543T
8-Bit Latched Registered Transceiver
Features
鈥?/div>
Function, pinout, and drive compatible with FCT and
F logic
鈥?/div>
FCT-C speed at 5.3 ns max. (Com鈥檒)
FCT-A speed at 6.5 ns max. (Com鈥檒)
鈥?/div>
Reduced V
OH
(typically = 3.3V) versions of equivalent
FCT functions
鈥?/div>
Edge-rate control circuitry for significantly improved
noise characteristics
鈥?/div>
Power-off disable feature
鈥?/div>
Matched rise and fall times
鈥?/div>
Fully compatible with TTL input and output logic levels
鈥?/div>
ESD > 2000V
鈥?Sink current
64 mA (Com鈥檒), 48 mA (Mil)
Source current
32 mA (Com鈥檒), 12 mA (Mil)
鈥?/div>
Separation controls for data flow in each direction
鈥?/div>
Back to back latches for storage
鈥?/div>
Extended commercial range of
鈭?0擄C
to +85擄C
Functional Description
The FCT543T octal latched transceiver contains two sets of
eight D-type latches with separate latch enable (LEAB, LEBA)
and output enable (OEAB, OEBA) controls for each set to
permit independent control of inputting and outputting in either
direction of data flow. For data flow from A to B, for example,
the A-to-B enable (CEAB) input must be LOW in order to enter
data from A or to take data from B, as indicated in the truth
table. With CEAB LOW, a LOW signal on the A-to-B latch
enable (LEAB) input makes the A-to-B latches transparent; a
subsequent LOW-to-HIGH transition of the LEAB signal puts
the A latches in the storage mode and their output no longer
change with the A inputs. With CEAB and OEAB both LOW,
the three-stage B output buffers are active and reflect the data
present at the output of the A latches. Control of data from B
to A is similar, but uses CEAB, LEAB, and OEAB inputs.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Functional Block Diagram
Detail A
D Q
LE
A
0
Q D
LE
B
0
Logic Block Diagram
A
0
CEAB
CEBA
LEAB
LEBA
A
1
A
2
A
3
A
4
A
5
A
6
A
7
OEBA
OEAB
CEBA
CEAB
LEBA
LEAB
B
1
B
2
B
3
B
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
OEAB
OEBA
B
1
B
2
B
3
B
4
B
5
B
6
B
7
Detail A x 7
B
4
B
5
B
6
B
7
Pin Configurations
SOIC/QSOP
Top View
LEBA
OEBA
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
CEAB
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
CEBA
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
LEAB
OEAB
Cypress Semiconductor Corporation
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?CA 95134 鈥?/div>
408-943-2600
May 1994 鈥?Revised March 17, 1997

CY54FCT543T相關(guān)型號(hào)PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！