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CY3672ADP000 Datasheet

  • CY3672ADP000

  • One-PLL General Purpose Flash Programmable Clock Generator

  • 9頁

  • CYPRESS

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CY22050
One-PLL General Purpose
Flash Programmable Clock Generator
Features
鈥?Integrated phase-locked loop (PLL)
鈥?Commercial and Industrial operation
鈥?Flash-programmable
Benefits
Internal PLL to generate six outputs up to 200 MHz. Able to generate
custom frequencies from an external reference crystal or a driven source.
Performance guaranteed for applications that require an extended temper-
ature range.
Reprogrammable technology allows easy customization, quick turnaround
on design changes and product performance enhancements, and better
inventory control. Parts can be reprogrammed up to 100 times, reducing
inventory of custom parts and providing an easy method for upgrading
existing designs.
In-house programming of samples and prototype quantities is available
using the CY3672 FTG Development Kit. Production quantities are
available through Cypress鈥檚 value-added distribution partners or by using
third party programmers from BP Microsystems, HiLo Systems, and
others.
High performance suited for commercial, industrial, networking, telecomm
and other general-purpose applications.
Application compatibility in standard and low-power systems.
Industry standard packaging saves on board space.
Input Frequency Range
8 MHz鈥?0 MHz (external crystal)
1 MHz鈥?33 MHz (driven clock)
8 MHz鈥?0 MHz (external crystal)
1 MHz鈥?33 MHz (driven clock)
Output Frequency Range
80 kHz鈥?00 MHz (3.3V)
80 KHz鈥?66.6 MHz (2.5V)
80 kHz鈥?66.6 MHz (3.3V)
80 KHz鈥?50 MHz (2.5V)
Specifications
Field-programmable
commercial temperature
Field-programmable
industrial temperature
LCLK1
Divider
Bank 1
Output
Select
Matrix
VCO
P
PLL
Divider
Bank 2
CLK5
CLK6
LCLK2
LCLK3
LCLK4
鈥?Field-programmable
鈥?Low-skew, low-jitter, high-accuracy outputs
鈥?3.3V operation with 2.5V output option
鈥?16-lead TSSOP
Part Number
CY22050FC
CY22050FI
Outputs
6
6
Logic Block Diagram
XIN
XOUT
OSC.
Q
桅
OE
VDD
AVDD AVSS
VSS
VDDL
VSSL
PWRDWN
Pin Configuration
XIN
VDD
AVDD
PWRDWN
AVSS
VSSL
LCLK1
LCLK2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
XOUT
CLK6
CLK5
VSS
LCLK4
VDDL
OE
LCLK3
Cypress Semiconductor Corporation
Document #: 38-07006 Rev. *D
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised January 29, 2005

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