音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

CY28329ZXCT Datasheet

  • CY28329ZXCT

  • 133-MHz Spread Spectrum Clock Synthesizer/Driver with Differ...

  • 17頁

  • CYPRESS

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預覽

CY28329
133-MHz Spread Spectrum Clock Synthesizer/Driver
with Differential CPU Outputs
Features
鈥?Multiple output clocks at different frequencies
鈥?Four pairs of differential CPU outputs, up to 133 MHz
鈥?Ten synchronous PCI clocks, three free-running
鈥?Six 3V66 clocks
鈥?Two 48-MHz clocks
鈥?One reference clock at 14.318 MHz
鈥?One VCH clock
鈥?Spread Spectrum clocking (down spread)
鈥?Power-down features (PCI_STOP#, PD#)
鈥?Three Select inputs (Mode select & IC Frequency
Select)
鈥?OE and Test Mode support
鈥?56-pin SSOP package and 56-pin TSSOP package
Benefits
鈥?Motherboard clock generator
鈥?Support Multiple CPUs and a chipset
鈥?Support for PCI slots and chipset
鈥?Supports AGP and Hub Link
鈥?Supports USB host controller and graphic controller
鈥?Supports ISA slots and I/O chip
鈥?Enables reduction of EMI and overall system cost
鈥?Enables ACPI compliant designs
鈥?Supports up to four CPU clock frequencies
鈥?Enables ATE and 鈥渂ed of nails鈥?testing
鈥?Widely available, standard package enables lower cost
Logic Block Diagram
VDD_REF
PWR
Pin Configurations
SSOP and TSSOP
Top View
VDD_REF
XTAL_IN
XTAL_OUT
GND_REF
PCI_F0
PWR
X1
X2
XTAL
OSC
REF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
REF
S1
CPU3
CPU3#
CPU0
CPU0#
VDD_CPU
CPU1
CPU1#
GND_CPU
VDD_CPU
CPU2
CPU2#
MULT0
IREF
GND_IREF
S2
USB
DOT
VDD_ 48 MHz
GND_ 48 MHz
3V66_1/VCH
PCI_STOP#
3V66_0
VDD_3V66
GND_3V66
SCLK
SDATA
PLL Ref Freq
PLL 1
Mult0
S1:2
VTTPWRGD#
Gate
Divider
Network
VDD_CPU
CPU[0:3]
CPU[0:3]#
PCI_F1
PCI_F2
VDD_PCI
GND_PCI
PCI0
PCI1
PCI2
PCI3
VDD_PCI
GND_PCI
PCI4
PCI5
PCI6
VDD_3V66
GND_3V66
66BUFF0/3V66_2
66BUFF1/3V66_3
66BUFF2/3V66_4
66IN/3V66_5
PD#
VDD_CORE
GND_CORE
VTTPWRGD#
PWR
Stop
Clock
Control
VDD_PCI
PCI_F[0:2]
PCI0:6
CY28329
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
PCI_STOP#
/2
PD#
VDD_3V66
3V66_0
PWR
PWR
3V66_[2:]4/
66BUFF0:2
3V66_5/ 66IN
PLL 2
VDD_48MHz
PWR
USB (48MHz)
DOT (48MHz)
VCH_CLK/ 3V66_1
SDATA
SCLK
SMBus
Logic
Cypress Semiconductor Corporation
Document #: 38-07040 Rev. *E
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised January 19, 2005

CY28329ZXCT 產(chǎn)品屬性

  • 2,000

  • 集成電路 (IC)

  • 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器

  • *

  • SLCY28329ZXCT

CY28329ZXCT相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Intel CK408 Mobile Clock Synthesizer
    CYPRESS
  • 英文版
    Intel CK408 Mobile Clock Synthesizer
    CYPRESS [C...
  • 英文版
    Spread Spectrum Timing Solution for Serverworks Chipset
    CYPRESS
  • 英文版
    Spread Spectrum Timing Solution for Serverworks Chipset
    CYPRESS [C...
  • 英文版
    Clocks and Buffers
    ETC
  • 英文版
    Clock Generator for Serverworks Grand Champion Chipset Appli...
    CYPRESS
  • 英文版
    Frequency Generator for Intel Integrated Chipset
    CYPRESS
  • 英文版
    Frequency Generator for Intel Integrated Chipset
    CYPRESS [C...
  • 英文版
    Clocks and Buffers
    ETC
  • 英文版
    FTG for VIA PL133T and PLE133T
    CYPRESS
  • 英文版
    Clocks and Buffers
    ETC
  • 英文版
    Clocks and Buffers
  • 英文版
    Clocks and Buffers
    ETC
  • 英文版
    Clocks and Buffers
  • 英文版
    Clocks and Buffers
    ETC
  • 英文版
    FTG for Intel? Pentium? 4 CPU and Chipsets
    CYPRESS
  • 英文版
    FTG for Intel Pentium 4 CPU and Chipsets
    CYPRESS
  • 英文版
    FTG for Intel Pentium 4 CPU and Chipsets
    CYPRESS [C...
  • 英文版
    FTG for VIA PT880 Serial Chipset
    CYPRESS
  • 英文版
    FTG for VIA PT880 Serial Chipset
    CYPRESS [C...

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！