CY25823
CK-SSCD Spread Spectrum Differential Clock
Specification
Features
鈥?3.3V operation
鈥?96- and 100-MHz frequency support
鈥?Selectable slew rate control
鈥?200-ps jitter
鈥?I
2
C programmability
鈥?250-碌A(chǔ) power-down current
鈥?Lexmark Spread Spectrum for best electromagnetic
interference (EMI) reduction
鈥?16-pin TSSOP package
Block Diagram
VDD
VDDA
REFOUT
CLKOUT
(SSCG Output)
CLKOUT#
Clock Input
Freq.
Divider
M
Phase
Detector
Charge
Pump
危
Modulating
Waveform
VCO
Post
Dividers
SDATA
SCLK
PWRDWN
Logic
Control
Feedback
Divider
N
PLL
VSS
VSSA
Pin Configuration
CLKIN
S3
S2
S1
PW RDW N
REFOUT/SEL
SCLK
SDATA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
16 pin TSSOP
VDDA
VSSA
IREF
VSSIREF
CLKOUT
CLKOUT#
VSS
VDD
Cypress Semiconductor Corporation
Document #: 38-07579 Rev. *C
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised September 02, 2004
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